]> git.sur5r.net Git - u-boot/commit
fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses
authorBhupesh Sharma <bhupesh.sharma@freescale.com>
Tue, 6 Jan 2015 21:11:21 +0000 (13:11 -0800)
committerYork Sun <yorksun@freescale.com>
Tue, 24 Feb 2015 21:08:06 +0000 (13:08 -0800)
commit9c66ce662c076fc1f5e57c4e72126e41d56d0b80
treebb3c49d17da0fad2006a3dc2a26d96af08161bf1
parent38dac81b3d0e777f301ca98100bfbcab01d616c2
fsl-ch3/lowlevel: TZPC and TZASC programming to configure non-secure accesses

This patch ensures that the TZPC (BP147) and TZASC-400 programming
happens for LS2085A SoC only when the desired config flags are
enabled and ensures that the TZPC programming is done to allow Non-secure
(NS) + secure (S) transactions only for DCGF registers.

The TZASC component is not present on LS2085A-Rev1, so the TZASC-400
config flag is turned OFF for now.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
arch/arm/include/asm/arch-fsl-lsch3/config.h
doc/README.fsl-trustzone-components [new file with mode: 0644]
include/configs/ls2085a_common.h