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net: zynq: Don't overwrite gem_rclk_ctrl with default value
authorStefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Tue, 17 Jan 2017 15:27:24 +0000 (16:27 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 17 Feb 2017 09:22:46 +0000 (10:22 +0100)
commita259243e9d5895e03348cad98b82524e61cd47e8
tree56186173d41941656bd4e0339e166cb5d72efc65tree | snapshot
parent85d0bea153c76f4a3912b5683222885bfd37c769commit | diff
net: zynq: Don't overwrite gem_rclk_ctrl with default value

The gem[0-1]_rclk_ctrl registers control the source of the rx clock,
control and data signals and configure via ps7_init function. Don't
overwrite the register with the default value.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/mach-zynq/slcr.c diff | blob | history
drivers/net/zynq_gem.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git