]> git.sur5r.net Git - u-boot/commit
net: fec: Avoid MX28 bus sync issue
authorMarek Vasut <marex@denx.de>
Thu, 11 Jul 2013 23:03:04 +0000 (01:03 +0200)
committerStefano Babic <sbabic@denx.de>
Fri, 12 Jul 2013 07:29:32 +0000 (09:29 +0200)
commitab94cd491faf3e7b0a3b934f5817b15997bcb315
tree2761f93234e1c2c1eaf9abe8c0d37f0dade70ec2
parent3104ce1f6f2d541e8bf2edfb698d0f51dc43b5fb
net: fec: Avoid MX28 bus sync issue

The MX28 multi-layer AHB bus can be too slow and trigger the
FEC DMA too early, before all the data hit the DRAM. This patch
ensures the data are written in the RAM before the DMA starts.
Please see the comment in the patch for full details.

This patch was produced with an amazing help from Albert Aribaud,
who pointed out it can possibly be such a bus synchronisation
issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
drivers/net/fec_mxc.c