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(parent: 20cddd5) | patch
Some efficiency improvements in Risc-V port.
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Wed, 28 Nov 2018 19:35:40 +0000 (19:35 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Wed, 28 Nov 2018 19:35:40 +0000 (19:35 +0000)
commitb1a107796313c5a64ee33ca3accff1a701b2cc71
treeaeee46d4575d90135b0d3a5f165e63fb6cf9b279tree | snapshot
parent20cddd54fd500b29cc3272c667d0b304eaa72db3commit | diff
Some efficiency improvements in Risc-V port.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2597 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c diff | blob | history
FreeRTOS/Source/portable/GCC/RISC-V-RV32/portASM.S diff | blob | history
FreeRTOS imported from SF.net SVN