]> git.sur5r.net Git - freertos/blob - FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
Some efficiency improvements in Risc-V port.
[freertos] / FreeRTOS / Source / portable / GCC / RISC-V-RV32 / port.c
1 /*\r
2  * FreeRTOS Kernel V10.1.1\r
3  * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
4  *\r
5  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
6  * this software and associated documentation files (the "Software"), to deal in\r
7  * the Software without restriction, including without limitation the rights to\r
8  * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
9  * the Software, and to permit persons to whom the Software is furnished to do so,\r
10  * subject to the following conditions:\r
11  *\r
12  * The above copyright notice and this permission notice shall be included in all\r
13  * copies or substantial portions of the Software.\r
14  *\r
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
17  * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
18  * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
19  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
21  *\r
22  * http://www.FreeRTOS.org\r
23  * http://aws.amazon.com/freertos\r
24  *\r
25  * 1 tab == 4 spaces!\r
26  */\r
27 \r
28 /*-----------------------------------------------------------\r
29  * Implementation of functions defined in portable.h for the RISC-V RV32 port.\r
30  *----------------------------------------------------------*/\r
31 \r
32 /* Scheduler includes. */\r
33 #include "FreeRTOS.h"\r
34 #include "task.h"\r
35 #include "portmacro.h"\r
36 \r
37 /*\r
38  * Setup the timer to generate the tick interrupts.  The implementation in this\r
39  * file is weak to allow application writers to change the timer used to\r
40  * generate the tick interrupt.\r
41  */\r
42 void vPortSetupTimerInterrupt( void ) __attribute__(( weak ));\r
43 \r
44 /*\r
45  * Used to catch tasks that attempt to return from their implementing function.\r
46  */\r
47 static void prvTaskExitError( void );\r
48 \r
49 /*-----------------------------------------------------------*/\r
50 \r
51 /* Used to program the machine timer compare register. */\r
52 uint64_t ullNextTime = 0ULL;\r
53 const uint64_t *pullNextTime = &ullNextTime;\r
54 const uint32_t ulTimerIncrementsForOneTick = ( uint32_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ); /* Assumes increment won't go over 32-bits. */\r
55 volatile uint64_t * const pullMachineTimerCompareRegister = ( volatile uint64_t * const ) ( configCLINT_BASE_ADDRESS + 0x4000 );\r
56 \r
57 /*-----------------------------------------------------------*/\r
58 \r
59 void prvTaskExitError( void )\r
60 {\r
61 volatile uint32_t ulx = 0;\r
62 \r
63         /* A function that implements a task must not exit or attempt to return to\r
64         its caller as there is nothing to return to.  If a task wants to exit it\r
65         should instead call vTaskDelete( NULL ).\r
66 \r
67         Artificially force an assert() to be triggered if configASSERT() is\r
68         defined, then stop here so application writers can catch the error. */\r
69         configASSERT( ulx == ~0UL );\r
70         portDISABLE_INTERRUPTS();\r
71         for( ;; );\r
72 }\r
73 /*-----------------------------------------------------------*/\r
74 \r
75 /*\r
76  * See header file for description.\r
77  */\r
78 StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
79 {\r
80 uint32_t mstatus;\r
81 const uint32_t ulMPIE_Bit = 0x80, ulMPP_Bits = 0x1800;\r
82         /*\r
83            X1 to X31 integer registers for the 'I' profile, X1 to X15 for the 'E' profile.\r
84 \r
85                 Register        ABI Name                Description                                     Saver\r
86                 x0                      zero                    Hard-wired zero                                 -\r
87                 x1                      ra                              Return address                                  Caller\r
88                 x2                      sp                              Stack pointer                                   Callee\r
89                 x3                      gp                              Global pointer                                  -\r
90                 x4                      tp                              Thread pointer                                  -\r
91                 x5-7            t0-2                    Temporaries                                     Caller\r
92                 x8                      s0/fp                   Saved register/Frame pointer    Callee\r
93                 x9                      s1                              Saved register                                  Callee\r
94                 x10-11          a0-1                    Function Arguments/return values Caller\r
95                 x12-17          a2-7                    Function arguments                              Caller\r
96                 x18-27          s2-11                   Saved registers                                 Callee\r
97                 x28-31          t3-6                    Temporaries                                     Caller\r
98         */\r
99 \r
100         /* Start task with interrupt enabled. */\r
101         __asm volatile ("csrr %0, mstatus" : "=r"(mstatus));\r
102         mstatus |= ulMPIE_Bit | ulMPP_Bits;\r
103         pxTopOfStack--;\r
104         *pxTopOfStack = mstatus;\r
105 \r
106         /* Numbers correspond to the x register number. */\r
107         pxTopOfStack--;\r
108         *pxTopOfStack = ( StackType_t ) 31;\r
109         pxTopOfStack--;\r
110         *pxTopOfStack = ( StackType_t ) 30;\r
111         pxTopOfStack--;\r
112         *pxTopOfStack = ( StackType_t ) 29;\r
113         pxTopOfStack--;\r
114         *pxTopOfStack = ( StackType_t ) 28;\r
115         pxTopOfStack--;\r
116         *pxTopOfStack = ( StackType_t ) 27;\r
117         pxTopOfStack--;\r
118         *pxTopOfStack = ( StackType_t ) 26;\r
119         pxTopOfStack--;\r
120         *pxTopOfStack = ( StackType_t ) 25;\r
121         pxTopOfStack--;\r
122         *pxTopOfStack = ( StackType_t ) 24;\r
123         pxTopOfStack--;\r
124         *pxTopOfStack = ( StackType_t ) 23;\r
125         pxTopOfStack--;\r
126         *pxTopOfStack = ( StackType_t ) 22;\r
127         pxTopOfStack--;\r
128         *pxTopOfStack = ( StackType_t ) 21;\r
129         pxTopOfStack--;\r
130         *pxTopOfStack = ( StackType_t ) 20;\r
131         pxTopOfStack--;\r
132         *pxTopOfStack = ( StackType_t ) 19;\r
133         pxTopOfStack--;\r
134         *pxTopOfStack = ( StackType_t ) 18;\r
135         pxTopOfStack--;\r
136         *pxTopOfStack = ( StackType_t ) 17;\r
137         pxTopOfStack--;\r
138         *pxTopOfStack = ( StackType_t ) 16;\r
139         pxTopOfStack--;\r
140         *pxTopOfStack = ( StackType_t ) 15;\r
141         pxTopOfStack--;\r
142         *pxTopOfStack = ( StackType_t ) 14;\r
143         pxTopOfStack--;\r
144         *pxTopOfStack = ( StackType_t ) 13;\r
145         pxTopOfStack--;\r
146         *pxTopOfStack = ( StackType_t ) 12;\r
147         pxTopOfStack--;\r
148         *pxTopOfStack = ( StackType_t ) 11;\r
149         pxTopOfStack--;\r
150         *pxTopOfStack = ( StackType_t ) pvParameters;\r
151         pxTopOfStack--;\r
152         *pxTopOfStack = ( StackType_t ) 9;\r
153         pxTopOfStack--;\r
154         *pxTopOfStack = ( StackType_t ) 8;\r
155         pxTopOfStack--;\r
156         *pxTopOfStack = ( StackType_t ) 7;\r
157         pxTopOfStack--;\r
158         *pxTopOfStack = ( StackType_t ) 6;\r
159         pxTopOfStack--;\r
160         *pxTopOfStack = ( StackType_t ) 5;\r
161         pxTopOfStack--;\r
162 //      *pxTopOfStack = ( StackType_t ) 4;  /* Thread pointer. */\r
163 //      pxTopOfStack--;\r
164 //      *pxTopOfStack = ( StackType_t ) 3;  /* Global pointer. */\r
165 //      pxTopOfStack--;\r
166 //      *pxTopOfStack = ( StackType_t ) 2;  /* Stack pointer. */\r
167 //      pxTopOfStack--;\r
168         *pxTopOfStack = ( StackType_t ) prvTaskExitError;\r
169         pxTopOfStack--;\r
170         *pxTopOfStack = ( StackType_t ) pxCode;\r
171 \r
172         return pxTopOfStack;\r
173 }\r
174 /*-----------------------------------------------------------*/\r
175 \r
176 void vPortSetupTimerInterrupt( void )\r
177 {\r
178 uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;\r
179 volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );\r
180 volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );\r
181 \r
182         do\r
183         {\r
184                 ulCurrentTimeHigh = *pulTimeHigh;\r
185                 ulCurrentTimeLow = *pulTimeLow;\r
186         } while( ulCurrentTimeHigh != *pulTimeHigh );\r
187 \r
188         ullNextTime = ( uint64_t ) ulCurrentTimeHigh;\r
189         ullNextTime <<= 32ULL;\r
190         ullNextTime |= ( uint64_t ) ulCurrentTimeLow;\r
191         ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;\r
192         *pullMachineTimerCompareRegister = ullNextTime;\r
193 \r
194         /* Prepare the time to use after the next tick interrupt. */\r
195         ullNextTime += ( uint64_t ) ulTimerIncrementsForOneTick;\r
196 \r
197         /* Enable timer interrupt */\r
198         __asm volatile( "csrs mie, %0" :: "r"(0x80) ); /* 1<<7 for timer interrupt. */\r
199 }\r
200 /*-----------------------------------------------------------*/\r
201 \r
202 void Software_IRQHandler( void )\r
203 {\r
204 volatile uint32_t * const ulSoftInterrupt = ( uint32_t * ) configCLINT_BASE_ADDRESS;\r
205 \r
206         vTaskSwitchContext();\r
207 \r
208         /* Clear software interrupt. */\r
209         *( ( uint32_t * ) configCLINT_BASE_ADDRESS ) &= 0x08UL;\r
210 }\r
211 /*-----------------------------------------------------------*/\r
212 \r
213 BaseType_t xPortStartScheduler( void )\r
214 {\r
215 extern void xPortStartFirstTask( void );\r
216 \r
217         #if( configASSERT_DEFINED == 1 )\r
218         {\r
219                 volatile uint32_t mtvec = 0;\r
220 \r
221                 /* Check the least significant two bits of mtvec are 00 - indicating single\r
222                 vector mode. */\r
223                 __asm volatile( "csrr %0, mtvec" : "=r"( mtvec ) );\r
224                 configASSERT( ( mtvec & 0x03UL ) == 0 );\r
225         }\r
226         #endif\r
227 \r
228         vPortSetupTimerInterrupt();\r
229         xPortStartFirstTask();\r
230 \r
231         /* Should not get here as after calling xPortStartFirstTask() only tasks\r
232         should be executing. */\r
233         return pdFAIL;\r
234 }\r
235 /*-----------------------------------------------------------*/\r
236 \r
237 void vPortEndScheduler( void )\r
238 {\r
239         /* Not implemented. */\r
240         for( ;; );\r
241 }\r
242 \r
243 \r
244 \r
245 \r