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(parent: 7dbda25) | patch
mx6ul_14x14_evk: Adjust SPL DDR3 settings
authorFabio Estevam <fabio.estevam@nxp.com>
Mon, 29 Aug 2016 23:37:17 +0000 (20:37 -0300)
committerStefano Babic <sbabic@denx.de>
Tue, 6 Sep 2016 16:22:48 +0000 (18:22 +0200)
commitb343417e2959d043ffd831fd15b08e2a49de6340
tree403131d071d0464b7df090336bb83c075621ff9dtree | snapshot
parent7dbda25ecd6d7cba13d29161675309ca43e3ba12commit | diff
mx6ul_14x14_evk: Adjust SPL DDR3 settings

Adjust DDR3 initialization done in SPL by comparing them against
the NXP DCD table.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git