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(parent: f07217c) | patch
Fix bug in [id]cache_status commands for MPC85xx processors;
authorWolfgang Denk <wd@pollux.denx.de>
Sun, 12 Mar 2006 23:46:05 +0000 (00:46 +0100)
committerWolfgang Denk <wd@pollux.denx.de>
Sun, 12 Mar 2006 23:46:05 +0000 (00:46 +0100)
commitb38dbd4622a2abeedf9fcb1806958d9afac0bbd4
tree5141e4352c2db17593f8c30b0f19cb6ab3ba354dtree | snapshot
parentf07217c9e2912af5b2f05d61829f62cc865b481fcommit | diff
Fix bug in [id]cache_status commands for MPC85xx processors;
should look at LSB of L1CSRn registers to determine if L1 cache is
enabled, not the MSB.
Patch by Murray Jensen, 19 Jul 2005
CHANGELOG diff | blob | history
cpu/mpc85xx/start.S diff | blob | history
Cloned from git://git.denx.de/u-boot.git