]> git.sur5r.net Git - u-boot/commit
travis.yml: Support RISC-V
authorRick Chen <rick@andestech.com>
Fri, 12 Jan 2018 06:57:09 +0000 (14:57 +0800)
committerTom Rini <trini@konsulko.com>
Fri, 12 Jan 2018 13:05:12 +0000 (08:05 -0500)
commitb6896fcbeb891b1e36c82e33e546e5ca277b8e52
treedd37ba83473363b57e66dfc2ea3482f568337d31
parent3fafced74df234c708e645a373a70db665e4e6ce
travis.yml: Support RISC-V

Enable travis-ci support with a link having built.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
.travis.yml