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Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
authorTom Warren <twarren.nvidia@gmail.com>
Fri, 8 Feb 2013 07:25:31 +0000 (07:25 +0000)
committerTom Warren <twarren@nvidia.com>
Thu, 14 Mar 2013 18:06:41 +0000 (11:06 -0700)
commitb77c3547e867f7876b3f970125c45d556588d9cb
tree1d4bc63e6940d611cd965410f16c6ae0b892f68atree | snapshot
parente32624ef820f821b94333402788e79979681eb29commit | diff
Tegra114: fdt: Update DT files with I2C info for T114/Dalmore

T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
arch/arm/dts/tegra114.dtsi diff | blob | history
board/nvidia/dts/tegra114-dalmore.dts diff | blob | history
Cloned from git://git.denx.de/u-boot.git