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(parent: 49fd1f3) | patch
armv8/fsl-lsch3: Add support for second DDR clock
authorYork Sun <yorksun@freescale.com>
Tue, 6 Jan 2015 21:18:49 +0000 (13:18 -0800)
committerYork Sun <yorksun@freescale.com>
Tue, 24 Feb 2015 21:09:14 +0000 (13:09 -0800)
commitb87e6f88e9218da3de371bb6cc8a34924153178e
treefe1c672d5af630646b8c1193b9f00c2132e857f8tree | snapshot
parent49fd1f3f265efc00d61effa995bd6a733bf273d8commit | diff
armv8/fsl-lsch3: Add support for second DDR clock

FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs to
change to support multiple clocks.

Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/cpu.c diff | blob | history
arch/arm/cpu/armv8/fsl-lsch3/speed.c diff | blob | history
arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h diff | blob | history
arch/arm/include/asm/global_data.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git