]> git.sur5r.net Git - u-boot/commit
board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL
authorPrabhakar Kushwaha <prabhakar@freescale.com>
Thu, 15 May 2014 11:13:12 +0000 (16:43 +0530)
committerYork Sun <yorksun@freescale.com>
Fri, 16 May 2014 21:24:27 +0000 (16:24 -0500)
commitbc2d40ca10075c8bf0c8c3cb970b1381caf5c588
treeb9877a89c350cec2879142f4db4fc8bfd6eec9ec
parent3051f3f999cc1bae465126f5766329058e12acfa
board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL

In the earlier patches, the SPL/TPL fraamework was introduced.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.

For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.

This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
board/freescale/p1_p2_rdb/Makefile
board/freescale/p1_p2_rdb/ddr.c
board/freescale/p1_p2_rdb/spl.c [new file with mode: 0644]
board/freescale/p1_p2_rdb/spl_minimal.c [new file with mode: 0644]
board/freescale/p1_p2_rdb/tlb.c
include/configs/P1_P2_RDB.h
nand_spl/board/freescale/p1_p2_rdb/Makefile [deleted file]
nand_spl/board/freescale/p1_p2_rdb/nand_boot.c [deleted file]