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(parent: d3bee08) | patch
tsec: Fix eTSEC2 link problem on P2020RDB
authorFelix Radensky <felix@embedded-sol.com>
Sun, 27 Jun 2010 22:57:39 +0000 (01:57 +0300)
committerWolfgang Denk <wd@denx.de>
Tue, 29 Jun 2010 21:03:23 +0000 (23:03 +0200)
commitc987f4753b0afadb38acd7e61df7ba11e8a0203f
tree319f90bd75fcc28742fb6b76b5bb30dfc3316709tree | snapshot
parentd3bee08332fbc9cc5b6dc22ecd34050a85d44d0acommit | diff
tsec: Fix eTSEC2 link problem on P2020RDB

On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.

Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
drivers/net/tsec.c diff | blob | history
include/configs/P1_P2_RDB.h diff | blob | history
Cloned from git://git.denx.de/u-boot.git