]> git.sur5r.net Git - u-boot/commit
armv8/fsl-lsch3: Update code to release secondary cores
authorPriyanka Jain <priyanka.jain@nxp.com>
Thu, 17 Nov 2016 06:59:56 +0000 (12:29 +0530)
committerYork Sun <york.sun@nxp.com>
Tue, 22 Nov 2016 19:38:48 +0000 (11:38 -0800)
commite87c673c206aa3eb75eb94e65d8d50d7fabaf598
tree04e110309a4deebba7e05dcf1be7881e6cf2b791
parent9ae836cde7aa8f54ee06879b1653b7260f866629
armv8/fsl-lsch3: Update code to release secondary cores

NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one.

Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: remove "inline" from declaration of initiator_type]
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
arch/arm/cpu/armv8/fsl-layerscape/cpu.h
arch/arm/cpu/armv8/fsl-layerscape/mp.c