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powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting
authorPrabhakar Kushwaha <prabhakar@freescale.com>
Sun, 29 Apr 2012 23:57:25 +0000 (23:57 +0000)
committerAndy Fleming <afleming@freescale.com>
Fri, 6 Jul 2012 22:30:31 +0000 (17:30 -0500)
commite87dc41fc11189fd51b2954e444ae8cc0ed50eba
tree1ff8ab0f61ac286a1320d032790e944ff4963a48tree | snapshot
parentad75d44239e3d57bb1bf4607a0e5d075f4a73a27commit | diff
powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting

During NAND_SPL boot, base address and different register are programmed
default by corresponding NAND controllers(eLBC/IFC). These settings are
sufficient enough for NAND SPL.

Avoid updating these register.They will be programmed during NAND RAMBOOT.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
arch/powerpc/cpu/mpc85xx/cpu_init_nand.c diff | blob | history
Cloned from git://git.denx.de/u-boot.git