]> git.sur5r.net Git - u-boot/commit
sunxi: Support H3 CCU security switches
authorChen-Yu Tsai <wens@csie.org>
Wed, 6 Jan 2016 07:13:07 +0000 (15:13 +0800)
committerHans de Goede <hdegoede@redhat.com>
Tue, 26 Jan 2016 15:20:05 +0000 (16:20 +0100)
commited80584f3087f8d4da996cddd9807fc90f3de06c
tree774b96da536519157b0280342229fbdb4478a85d
parent5823664fb84612ef511136b66059710cccd71bed
sunxi: Support H3 CCU security switches

H3's CCU includes some switches which disable non-secure access to some
of the more critical clock controls, such as MBUS, PLLs, and main
platform busses.

Configure them to enable non-secure access.

For now the only SoC that has this feature is the H3. For other
platforms just use a default (weak) empty function so things do
not break.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
arch/arm/cpu/armv7/sunxi/clock.c
arch/arm/cpu/armv7/sunxi/clock_sun6i.c
arch/arm/include/asm/arch-sunxi/clock.h
arch/arm/include/asm/arch-sunxi/clock_sun6i.h