]> git.sur5r.net Git - u-boot/commit
powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
authorStephen George <stephen.george@freescale.com>
Wed, 20 Jul 2011 14:47:26 +0000 (09:47 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 29 Jul 2011 13:53:37 +0000 (08:53 -0500)
commitf110fe940c7bca04cf0104952555fd931b075fac
tree5555564fc5bbe499394a8199d134daaa9c57d211
parent70bfb032ec592c99f78791305641b22f85fb52db
powerpc/85xx: Adding configuration for DCSRCR to enable 32M access

Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Most DCSR registers are within 4M but the Nexus trace buffer
is located at offset 16M within the DCSR.

Configuring the LAW to be 32M to allow access to the Nexus
trace buffer. No TLB modification is required since accessing
the Nexus trace buffer from within u-boot is not required.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc85xx/cpu_init.c
arch/powerpc/include/asm/immap_85xx.h
board/freescale/corenet_ds/law.c