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RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kernel code...
authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Thu, 10 Oct 2019 17:54:56 +0000 (17:54 +0000)
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Thu, 10 Oct 2019 17:54:56 +0000 (17:54 +0000)
commit9e1df8e477dee0967cdad511d673101d667bedf0
tree5f43da23f87a0a9eb8571e8dadac1b9319779d48tree | snapshot
parent4f2054f711d7de73f640eb102cbf7031835bb497commit | diff
RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS kernel code - but not using it yet - still a work in progress.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2734 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.cproject diff | blob | history
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/.project diff | blob | history
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/FreeRTOSConfig.h [new file with mode: 0644] blob
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/main.c [new file with mode: 0644] blob
FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/src/sifive-welcome.c diff | blob | history
FreeRTOS imported from SF.net SVN