]> git.sur5r.net Git - u-boot/commitdiff
Setup extra MIMC200 chip selects
authorMark Jackson <mpfj-list@mimc.co.uk>
Fri, 13 Feb 2009 15:48:18 +0000 (15:48 +0000)
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Mon, 23 Feb 2009 10:16:14 +0000 (11:16 +0100)
Added code to setup the extra Flash and FRAM chip selects as used on the
MIMC200 board.

V2 moves the init code from the common "cpu.c" file into the board specific
setup file.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
board/mimc/mimc200/mimc200.c

index 62c0943f5750c10f497ca4c6be196271962c82df..6df741e397625add6a906d88e21f09ea121154bd 100644 (file)
@@ -30,6 +30,8 @@
 #include <asm/arch/portmux.h>
 #include <lcd.h>
 
 #include <asm/arch/portmux.h>
 #include <lcd.h>
 
+#include "../../../cpu/at32ap/hsmc3.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 static const struct sdram_config sdram_config = {
 DECLARE_GLOBAL_DATA_PTR;
 
 static const struct sdram_config sdram_config = {
@@ -86,6 +88,18 @@ int board_early_init_f(void)
        /* release phys reset */
        gpio_set_value(GPIO_PIN_PC(18), 0);     /* PHY RESET (Release)  */
 
        /* release phys reset */
        gpio_set_value(GPIO_PIN_PC(18), 0);     /* PHY RESET (Release)  */
 
+       /* setup Data Flash chip select (NCS2) */
+       hsmc3_writel(MODE2, 0x20121003);
+       hsmc3_writel(CYCLE2, 0x000a0009);
+       hsmc3_writel(PULSE2, 0x0a060806);
+       hsmc3_writel(SETUP2, 0x00030102);
+
+       /* setup FRAM chip select (NCS3) */
+       hsmc3_writel(MODE3, 0x10120001);
+       hsmc3_writel(CYCLE3, 0x001e001d);
+       hsmc3_writel(PULSE3, 0x08040704);
+       hsmc3_writel(SETUP3, 0x02050204);
+
 #if defined(CONFIG_MACB)
        /* init macb0 pins */
        portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
 #if defined(CONFIG_MACB)
        /* init macb0 pins */
        portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);