This converts the following to Kconfig:
CONFIG_MXC_GPIO
Signed-off-by: Adam Ford <aford173@gmail.com>
41 files changed:
config ARCH_MX25
bool "NXP MX25"
select CPU_ARM926EJS
config ARCH_MX25
bool "NXP MX25"
select CPU_ARM926EJS
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7
select ROM_UNIFIED_SECTIONS
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7
select ROM_UNIFIED_SECTIONS
config ARCH_MX7
bool "Freescale MX7"
config ARCH_MX7
bool "Freescale MX7"
select SYS_FSL_SEC_LE
select BOARD_EARLY_INIT_F
select ARCH_MISC_INIT
select SYS_FSL_SEC_LE
select BOARD_EARLY_INIT_F
select ARCH_MISC_INIT
config ARCH_MX6
bool "Freescale MX6"
config ARCH_MX6
bool "Freescale MX6"
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_THUMB_BUILD if SPL
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_THUMB_BUILD if SPL
if ARCH_MX6
config SPL_LDSCRIPT
if ARCH_MX6
config SPL_LDSCRIPT
bool "Freescale MX5"
select CPU_V7
select BOARD_EARLY_INIT_F
bool "Freescale MX5"
select CPU_V7
select BOARD_EARLY_INIT_F
config ARCH_QEMU
bool "QEMU Virtual Platform"
config ARCH_QEMU
bool "QEMU Virtual Platform"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FPGA_XILINX=y
CONFIG_MMC_MXC=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FPGA_XILINX=y
CONFIG_MMC_MXC=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),64k(env1),64k(env2),3776k(kernel1),3776k(kernel2)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTDIDS_DEFAULT="nand0=mxc_nand,nor0=physmap-flash.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand:50m(root1),32m(rootfb),64m(pcache),64m(app1),10m(app2),-(spool);physmap-flash.0:512k(u-boot),64k(env1),64k(env2),3776k(kernel1),3776k(kernel2)"
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_CMD_BMP=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
CONFIG_ENV_IS_IN_EEPROM=y
CONFIG_CMD_BMP=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
CONFIG_ENV_IS_IN_EEPROM=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_NETDEVICES=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_ENV_IS_IN_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_MXC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
+# CONFIG_MXC_GPIO is not set
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_PINCTRL=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_PINCTRL=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
CONFIG_DM=y
CONFIG_DM_GPIO=y
CONFIG_IMX_RGPIO2P=y
+# CONFIG_MXC_GPIO is not set
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_PINCTRL=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_PINCTRL=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_EFI_PARTITION=y
# CONFIG_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
# CONFIG_PARTITION_UUIDS is not set
# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_NAND_MXC=y
+config MXC_GPIO
+ bool "Freescale/NXP MXC UART driver"
+ help
+ Support GPIO controllers on various i.MX platforms
+
config OMAP_GPIO
bool "TI OMAP GPIO driver"
depends on ARCH_OMAP2PLUS
config OMAP_GPIO
bool "TI OMAP GPIO driver"
depends on ARCH_OMAP2PLUS
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_MXC_UART
#define CONFIG_MXC_OCOTP
#define CONFIG_MXC_UART
#define CONFIG_MXC_OCOTP
#define CONFIG_DFU_MMC
/* Miscellaneous commands */
#define CONFIG_DFU_MMC
/* Miscellaneous commands */
/* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3
/* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CONS_INDEX 1
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CONS_INDEX 1
#define CONFIG_MXC_UART_BASE UART1_BASE
-/*
- * GPIO
- */
-#define CONFIG_MXC_GPIO
-
#define CONFIG_DFU_MMC
/* Miscellaneous commands */
#define CONFIG_DFU_MMC
/* Miscellaneous commands */
/* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3
/* Framebuffer and LCD */
#define CONFIG_VIDEO_IPUV3
#define CONFIG_MXC_OCOTP
#endif
#define CONFIG_MXC_OCOTP
#endif
-/* GPIO */
-#define CONFIG_MXC_GPIO
-
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
#define CONFIG_MXC_SPI
#define CONFIG_LAST_STAGE_INIT
#define CONFIG_LAST_STAGE_INIT
#define CONFIG_MXC_UART
#define CONFIG_MXC_OCOTP
#define CONFIG_MXC_UART
#define CONFIG_MXC_OCOTP
#define CONFIG_JFFS2_NAND
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_JFFS2_NAND
#define CONFIG_MXC_NAND_HWECC
-/*
- * GPIO
- */
-#define CONFIG_MXC_GPIO
-
/*
* U-Boot general configuration
*/
/*
* U-Boot general configuration
*/
/* EET platform additions */
#ifdef CONFIG_TARGET_IMX31_PHYCORE_EET
/* EET platform additions */
#ifdef CONFIG_TARGET_IMX31_PHYCORE_EET
-#define CONFIG_MXC_GPIO
-
#define CONFIG_HARD_SPI
#define CONFIG_MXC_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXC_SPI
#ifndef __M53EVK_CONFIG_H__
#define __M53EVK_CONFIG_H__
#ifndef __M53EVK_CONFIG_H__
#define __M53EVK_CONFIG_H__
-#define CONFIG_MXC_GPIO
-
#include <asm/arch/imx-regs.h>
#define CONFIG_REVISION_TAG
#include <asm/arch/imx-regs.h>
#define CONFIG_REVISION_TAG
/* High Level Configuration Options */
#define CONFIG_SYS_TEXT_BASE 0x81200000
/* High Level Configuration Options */
#define CONFIG_SYS_TEXT_BASE 0x81200000
#define CONFIG_SYS_FSL_CLK
#define CONFIG_SYS_TIMER_RATE 32768
#define CONFIG_SYS_FSL_CLK
#define CONFIG_SYS_TIMER_RATE 32768
#define CONFIG_MXC_SPI 1
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
#define CONFIG_MXC_SPI 1
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
/* PMIC Controller */
#define CONFIG_POWER
/* PMIC Controller */
#define CONFIG_POWER
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_HARD_SPI
#define CONFIG_MXC_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXC_SPI
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_MXC_SPI
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-#define CONFIG_MXC_GPIO
-
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART2_BASE
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART_BASE UART2_BASE
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-#define CONFIG_MXC_GPIO
-
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART
#define CONFIG_REVISION_TAG
#define CONFIG_MXC_UART
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
-#define CONFIG_MXC_GPIO
-
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 32
-/* GPIO */
-#define CONFIG_MXC_GPIO
-
/* MMC */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_FSL_ESDHC
/* MMC */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_FSL_ESDHC
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
-#define CONFIG_MXC_GPIO
-
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#ifndef CONFIG_SYS_DCACHE_OFF
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
#endif
-/* GPIO */
-#define CONFIG_MXC_GPIO
-
/* UART */
#define CONFIG_MXC_UART
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define __CONFIG_H
#define CONFIG_SYS_FSL_CLK
#define __CONFIG_H
#define CONFIG_SYS_FSL_CLK
#include <asm/arch/imx-regs.h>
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_MXC_SPI
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_MXC_SPI
/* PMIC Controller */
#define CONFIG_POWER
/* PMIC Controller */
#define CONFIG_POWER
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_DNS
-#define CONFIG_MXC_GPIO
-
#define CONFIG_NET_RETRY_COUNT 100
#define CONFIG_NET_RETRY_COUNT 100
-/*
- * GPIO
- */
-#define CONFIG_MXC_GPIO
-
CONFIG_MX6SX_SABRESD_REVA
CONFIG_MX6UL_14X14_EVK_EMMC_REWORK
CONFIG_MXC_EPDC
CONFIG_MX6SX_SABRESD_REVA
CONFIG_MX6UL_14X14_EVK_EMMC_REWORK
CONFIG_MXC_EPDC
CONFIG_MXC_GPT_HCLK
CONFIG_MXC_MCI_REGS_BASE
CONFIG_MXC_NAND_HWECC
CONFIG_MXC_GPT_HCLK
CONFIG_MXC_MCI_REGS_BASE
CONFIG_MXC_NAND_HWECC