]> git.sur5r.net Git - u-boot/commitdiff
rockchip: add option to change method of loading u-boot
authorXu Ziyuan <xzy.xu@rock-chips.com>
Tue, 12 Jul 2016 11:09:49 +0000 (19:09 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 26 Jul 2016 02:44:18 +0000 (20:44 -0600)
If we would like to boot from SD card, we have to implement mmc driver
in SPL stage, and get a slightly large SPL binary. Rockchip SoC's
bootrom code has the ability to load spl and u-boot, then boot.

If CONFIG_ROCKCHIP_SPL_BACK_TO_BROM is enabled, the spl will return to
bootrom in board_init_f(), then bootrom loads u-boot binary.

Loading sequence after rework:
bootrom ==> spl ==> bootrom ==> u-boot

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed up spelling of U-Boot, boorom, opinion->option, Rochchip:
Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/mach-rockchip/Kconfig
arch/arm/mach-rockchip/Makefile
arch/arm/mach-rockchip/board.c
arch/arm/mach-rockchip/rk3036/Makefile
arch/arm/mach-rockchip/rk3036/save_boot_param.S [deleted file]
arch/arm/mach-rockchip/rk3288-board-spl.c
arch/arm/mach-rockchip/save_boot_param.S [new file with mode: 0644]
doc/README.rockchip
include/configs/rk3288_common.h

index c49cc19be3bd7a9fa639906a79c41fd2a56ebe74..cf718fab57315786edc1c9dcc2bab1cd772407c7 100644 (file)
@@ -17,6 +17,14 @@ config ROCKCHIP_RK3036
          and video codec support. Peripherals include Gigabit Ethernet,
          USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
          and video codec support. Peripherals include Gigabit Ethernet,
          USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
 
+config ROCKCHIP_SPL_BACK_TO_BROM
+       bool "SPL returns to bootrom"
+       default y if ROCKCHIP_RK3036
+       help
+         Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
+          SPL will return to the boot rom, which will then load the U-Boot
+          binary to keep going on.
+
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 endif
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
 source "arch/arm/mach-rockchip/rk3036/Kconfig"
 endif
index 55567cb131b16293abfdead422a0abba68c73601..c08d61bb1182c8870ebc9c01924a64a0f6da4260 100644 (file)
@@ -7,6 +7,7 @@
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
 obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-$(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) += save_boot_param.o
 else
 obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
 endif
 else
 obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
 endif
index 816540e5821459fbfff4b5d953f3ee2e70cf2cf7..b07e0738eab30073642c026993fff906de7ffa77 100644 (file)
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/gpio.h>
+#include <dm/pinctrl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
 
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
 {
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+       struct udevice *pinctrl;
+       int ret;
+
+    /*
+     * We need to implement sdcard iomux here for the further
+     * initlization, otherwise, it'll hit sdcard command sending
+     * timeout exception.
+     */
+       ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
+       if (ret) {
+               debug("%s: Cannot find pinctrl device\n", __func__);
+               goto err;
+       }
+       ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
+       if (ret) {
+               debug("%s: Failed to set up SD card\n", __func__);
+               goto err;
+       }
+
+       return 0;
+err:
+       printf("board_init: Error %d\n", ret);
+
+       /* No way to report error here */
+       hang();
+
+       return -1;
+#else
        return 0;
        return 0;
+#endif
 }
 
 int dram_init(void)
 }
 
 int dram_init(void)
index 97d299d6cc6963efde70d88678d74c8773de528c..6095777b8fcf2b1b1d1ec3dfc4c78566fabe2648 100644 (file)
@@ -10,4 +10,3 @@ obj-y += syscon_rk3036.o
 endif
 
 obj-y += sdram_rk3036.o
 endif
 
 obj-y += sdram_rk3036.o
-obj-y += save_boot_param.o
diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S b/arch/arm/mach-rockchip/rk3036/save_boot_param.S
deleted file mode 100644 (file)
index 778ec83..0000000
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * (C) Copyright 2015 Google, Inc
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <linux/linkage.h>
-
-.globl SAVE_SP_ADDR
-SAVE_SP_ADDR:
-       .word 0
-
-/*
- * void save_boot_params
- *
- * Save sp, lr, r1~r12
- */
-ENTRY(save_boot_params)
-       push    {r1-r12, lr}
-       ldr     r0, =SAVE_SP_ADDR
-       str     sp, [r0]
-       b       save_boot_params_ret            @ back to my caller
-ENDPROC(save_boot_params)
-
-
-.globl back_to_bootrom
-ENTRY(back_to_bootrom)
-       ldr     r0, =SAVE_SP_ADDR
-       ldr     sp, [r0]
-       mov     r0, #0
-       pop     {r1-r12, pc}
-ENDPROC(back_to_bootrom)
index 123f58b27f2c3c459924e03f611e36b48ae50ad6..08152aa72bbf049968421beaa4b9846ed87850cd 100644 (file)
@@ -149,7 +149,7 @@ static int configure_emmc(struct udevice *pinctrl)
        return 0;
 }
 #endif
        return 0;
 }
 #endif
-
+extern void back_to_bootrom(void);
 void board_init_f(ulong dummy)
 {
        struct udevice *pinctrl;
 void board_init_f(ulong dummy)
 {
        struct udevice *pinctrl;
@@ -204,6 +204,9 @@ void board_init_f(ulong dummy)
                debug("DRAM init failed: %d\n", ret);
                return;
        }
                debug("DRAM init failed: %d\n", ret);
                return;
        }
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+       back_to_bootrom();
+#endif
 }
 
 static int setup_led(void)
 }
 
 static int setup_led(void)
diff --git a/arch/arm/mach-rockchip/save_boot_param.S b/arch/arm/mach-rockchip/save_boot_param.S
new file mode 100644 (file)
index 0000000..85b407b
--- /dev/null
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+.globl SAVE_SP_ADDR
+SAVE_SP_ADDR:
+       .word 0
+
+/*
+ * void save_boot_params
+ *
+ * Save sp, lr, r1~r12
+ */
+ENTRY(save_boot_params)
+       push    {r1-r12, lr}
+       ldr     r0, =SAVE_SP_ADDR
+       str     sp, [r0]
+       b       save_boot_params_ret            @ back to my caller
+ENDPROC(save_boot_params)
+
+
+.globl back_to_bootrom
+ENTRY(back_to_bootrom)
+       ldr     r0, =SAVE_SP_ADDR
+       ldr     sp, [r0]
+       mov     r0, #0
+       pop     {r1-r12, pc}
+ENDPROC(back_to_bootrom)
index e0572c80b9c7d6e22bfc695d0d73fde74f6789d5..182e3aedf6b8b31fc69892722a21a4d0d5eacf0d 100644 (file)
@@ -119,6 +119,20 @@ something like:
    Hit any key to stop autoboot:  0
    =>
 
    Hit any key to stop autoboot:  0
    =>
 
+The rockchip bootrom can load and boot an initial spl, then continue to
+load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
+Therefore RK3288 has another loading sequence like RK3036. The option of
+U-Boot is controlled with this setting in U-Boot:
+
+       #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+
+You can create the image via the following operations:
+
+   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
+       firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
+   cat firefly-rk3288/u-boot-dtb.bin >> out && \
+   sudo dd if=out of=/dev/sdc seek=64
+
 If you have an HDMI cable attached you should see a video console.
 
 For evb_rk3036 board:
 If you have an HDMI cable attached you should see a video console.
 
 For evb_rk3036 board:
index 8adc26fc8b4458bd740e8fbab69ceb59598f1eb8..90473bfec504996ebdd7f7780f2347157140c451 100644 (file)
 #define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SPL_BOARD_INIT
 
 #define CONFIG_SYS_NS16550_MEM32
 #define CONFIG_SPL_BOARD_INIT
 
+#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+/* Bootrom will load u-boot binary to 0x0 once return from SPL */
+#define CONFIG_SYS_TEXT_BASE           0x00000000
+#else
 #define CONFIG_SYS_TEXT_BASE           0x00100000
 #define CONFIG_SYS_TEXT_BASE           0x00100000
+#endif
 #define CONFIG_SYS_INIT_SP_ADDR                0x00100000
 #define CONFIG_SYS_LOAD_ADDR           0x00800800
 #define CONFIG_SPL_STACK               0xff718000
 #define CONFIG_SYS_INIT_SP_ADDR                0x00100000
 #define CONFIG_SYS_LOAD_ADDR           0x00800800
 #define CONFIG_SPL_STACK               0xff718000