]> git.sur5r.net Git - u-boot/commitdiff
imx-common: hab: support i.MX6SOLO
authorPeng Fan <van.freenix@gmail.com>
Mon, 23 May 2016 10:35:55 +0000 (18:35 +0800)
committerStefano Babic <sbabic@denx.de>
Tue, 24 May 2016 12:59:56 +0000 (14:59 +0200)
Add i.MX6SOLO support for hab function.
The difference between i.MX6SOLO and i.MX6DL is
the number of CPU cores. Besides this, they work
the same.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
arch/arm/imx-common/hab.c

index 8bbcc224546311213bf1ddccda9b0cb5981e89db..1e4ed7ecd8cf35822abbe7f08e348dbfa773ee56 100644 (file)
@@ -21,7 +21,8 @@
          is_cpu_type(MXC_CPU_MX6D)) &&                         \
          (soc_rev() >= CHIP_REV_1_5)) ?                        \
        ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+       ((is_cpu_type(MXC_CPU_MX6DL) ||                         \
+         is_cpu_type(MXC_CPU_MX6SOLO)) &&                      \
         (soc_rev() >= CHIP_REV_1_2)) ?                         \
        ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
        ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)        \
@@ -33,7 +34,8 @@
          is_cpu_type(MXC_CPU_MX6D)) &&                         \
          (soc_rev() >= CHIP_REV_1_5)) ?                        \
        ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+       ((is_cpu_type(MXC_CPU_MX6DL) ||                         \
+         is_cpu_type(MXC_CPU_MX6SOLO)) &&                      \
         (soc_rev() >= CHIP_REV_1_2)) ?                         \
        ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
        ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)      \
@@ -45,7 +47,8 @@
          is_cpu_type(MXC_CPU_MX6D)) &&                         \
          (soc_rev() >= CHIP_REV_1_5)) ?                        \
        ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+       ((is_cpu_type(MXC_CPU_MX6DL) ||                         \
+         is_cpu_type(MXC_CPU_MX6SOLO)) &&                      \
         (soc_rev() >= CHIP_REV_1_2)) ?                         \
        ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
        ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)    \
@@ -57,7 +60,8 @@
          is_cpu_type(MXC_CPU_MX6D)) &&                         \
          (soc_rev() >= CHIP_REV_1_5)) ?                        \
        ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+       ((is_cpu_type(MXC_CPU_MX6DL) ||                         \
+         is_cpu_type(MXC_CPU_MX6SOLO)) &&                      \
         (soc_rev() >= CHIP_REV_1_2)) ?                         \
        ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
        ((hab_rvt_entry_t *)HAB_RVT_ENTRY)                      \
@@ -69,7 +73,8 @@
          is_cpu_type(MXC_CPU_MX6D)) &&                         \
          (soc_rev() >= CHIP_REV_1_5)) ?                        \
        ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
-       (is_cpu_type(MXC_CPU_MX6DL) &&                          \
+       ((is_cpu_type(MXC_CPU_MX6DL) ||                         \
+         is_cpu_type(MXC_CPU_MX6SOLO)) &&                      \
         (soc_rev() >= CHIP_REV_1_2)) ?                         \
        ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
        ((hab_rvt_exit_t *)HAB_RVT_EXIT)                        \