ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settings

These settings were used only for the PH1-sLD3 and older SoCs.  The
PH1-LD4 and newer one just ignore them because their DDR-PHY take
care of such timing parameters instead.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c b/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c
index f2889c0f49e00419e6881b7db7ecc76e50dd3a8d..638aa11d0d7363ffdd07520aad8f3aa3eee0340e 100644 (file)
--- a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c
+++ b/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c
@@ -53,38 +53,11 @@ static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
        if (freq == 1333) {
                writel(0x45990b11, dramcont + UMC_CMDCTLA);
                writel(0x16958924, dramcont + UMC_CMDCTLB);
-               writel(0x5101046A, dramcont + UMC_INITCTLA);
-
-               if (size == 1)
-                       writel(0x27028B0A, dramcont + UMC_INITCTLB);
-               else if (size == 2)
-                       writel(0x38028B0A, dramcont + UMC_INITCTLB);
-
-               writel(0x000FF0FF, dramcont + UMC_INITCTLC);
-               writel(0x00000b51, dramcont + UMC_DRMMR0);
        } else if (freq == 1600) {
                writel(0x36BB0F17, dramcont + UMC_CMDCTLA);
                writel(0x18C6AA24, dramcont + UMC_CMDCTLB);
-               writel(0x5101387F, dramcont + UMC_INITCTLA);
-
-               if (size == 1)
-                       writel(0x2F030D3F, dramcont + UMC_INITCTLB);
-               else if (size == 2)
-                       writel(0x43030D3F, dramcont + UMC_INITCTLB);
-
-               writel(0x00FF00FF, dramcont + UMC_INITCTLC);
-               writel(0x00000d71, dramcont + UMC_DRMMR0);
        }
 
-       writel(0x00000006, dramcont + UMC_DRMMR1);
-
-       if (freq == 1333)
-               writel(0x00000290, dramcont + UMC_DRMMR2);
-       else if (freq == 1600)
-               writel(0x00000298, dramcont + UMC_DRMMR2);
-
-       writel(0x00000800, dramcont + UMC_DRMMR3);
-
        if (freq == 1333) {
                if (size == 1)
                        writel(0x00240512, dramcont + UMC_SPCCTLA);

diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c b/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c
index ff988e3540489ece59bf3b9dc244870a2c4d61d3..c28492c4f1d7fef90a1c8c97190b1966d5d55e14 100644 (file)
--- a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c
+++ b/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c
@@ -20,7 +20,6 @@ enum dram_size {
        DRAM_SZ_NR,
 };
 
-static u32 umc_initctlb[DRAM_SZ_NR] = {0x43030d3f, 0x43030d3f, 0x7b030d3f};
 static u32 umc_spcctla[DRAM_SZ_NR] = {0x002b0617, 0x003f0617, 0x00770617};
 
 static void umc_start_ssif(void __iomem *ssif_base)
@@ -88,13 +87,6 @@ static int umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
 
        writel(0x66bb0f17, dramcont + UMC_CMDCTLA);
        writel(0x18c6aa44, dramcont + UMC_CMDCTLB);
-       writel(0x5101387f, dramcont + UMC_INITCTLA);
-       writel(umc_initctlb[dram_size], dramcont + UMC_INITCTLB);
-       writel(0x00ff00ff, dramcont + UMC_INITCTLC);
-       writel(0x00000d71, dramcont + UMC_DRMMR0);
-       writel(0x00000006, dramcont + UMC_DRMMR1);
-       writel(0x00000298, dramcont + UMC_DRMMR2);
-       writel(0x00000000, dramcont + UMC_DRMMR3);
        writel(umc_spcctla[dram_size], dramcont + UMC_SPCCTLA);
        writel(0x00ff0008, dramcont + UMC_SPCCTLB);
        writel(0x000c00ae, dramcont + UMC_RDATACTL_D0);

diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c b/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c
index 3c2724eb37dd5c23debb45cadcb18f0386ac56ed..fa0619fc72881c5916cc872937a05bf801571b49 100644 (file)
--- a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c
+++ b/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c
@@ -58,24 +58,6 @@ static void umc_dramcont_init(void __iomem *dramcont, void __iomem *ca_base,
        writel(0x16958924, dramcont + UMC_CMDCTLB);
 #endif
 
-       writel(0x5101046A, dramcont + UMC_INITCTLA);
-
-       if (size == 1)
-               writel(0x27028B0A, dramcont + UMC_INITCTLB);
-       else if (size == 2)
-               writel(0x38028B0A, dramcont + UMC_INITCTLB);
-
-       writel(0x00FF00FF, dramcont + UMC_INITCTLC);
-       writel(0x00000b51, dramcont + UMC_DRMMR0);
-       writel(0x00000006, dramcont + UMC_DRMMR1);
-       writel(0x00000290, dramcont + UMC_DRMMR2);
-
-#ifdef CONFIG_DDR_STANDARD
-       writel(0x00000000, dramcont + UMC_DRMMR3);
-#else
-       writel(0x00000800, dramcont + UMC_DRMMR3);
-#endif
-
        if (size == 1)
                writel(0x00240512, dramcont + UMC_SPCCTLA);
        else if (size == 2)

diff --git a/arch/arm/mach-uniphier/dram/umc-regs.h b/arch/arm/mach-uniphier/dram/umc-regs.h
index b33e2da2bdaf162bb239b6e1c95d76caf52acf23..311cf3d352fb8a52f53ad06f4be87d5a682c78c9 100644 (file)
--- a/arch/arm/mach-uniphier/dram/umc-regs.h
+++ b/arch/arm/mach-uniphier/dram/umc-regs.h
@@ -56,15 +56,8 @@
 
 #define UMC_CMDCTLA            0x00000000
 #define UMC_CMDCTLB            0x00000004
-#define UMC_INITCTLA           0x00000008
-#define UMC_INITCTLB           0x0000000C
-#define UMC_INITCTLC           0x00000010
 #define UMC_INITSET            0x00000014
 #define UMC_INITSTAT           0x00000018
-#define UMC_DRMMR0             0x0000001C
-#define UMC_DRMMR1             0x00000020
-#define UMC_DRMMR2             0x00000024
-#define UMC_DRMMR3             0x00000028
 #define UMC_SPCCTLA            0x00000030
 #define UMC_SPCCTLB            0x00000034
 #define UMC_SPCSETA            0x00000038