bool "Support ClearFog"
select 88F6820
+config TARGET_MVEBU_DB_88F3720
+ bool "Support DB-88F3720 Armada 3720"
+ select ARMADA_3700
+
config TARGET_DB_88F6720
bool "Support DB-88F6720 Armada 375"
select ARMADA_375
config SYS_BOARD
default "clearfog" if TARGET_CLEARFOG
+ default "mvebu_db-88f3720" if TARGET_MVEBU_DB_88F3720
default "db-88f6720" if TARGET_DB_88F6720
default "db-88f6820-gp" if TARGET_DB_88F6820_GP
default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
config SYS_CONFIG_NAME
default "clearfog" if TARGET_CLEARFOG
+ default "mvebu_db-88f3720" if TARGET_MVEBU_DB_88F3720
default "db-88f6720" if TARGET_DB_88F6720
default "db-88f6820-gp" if TARGET_DB_88F6820_GP
default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
config SYS_VENDOR
default "Marvell" if TARGET_DB_MV784MP_GP
+ default "Marvell" if TARGET_MVEBU_DB_88F3720
default "Marvell" if TARGET_DB_88F6720
default "Marvell" if TARGET_DB_88F6820_GP
default "Marvell" if TARGET_DB_88F6820_AMC
--- /dev/null
+MVEBU_DB_88F3720 BOARD
+M: Stefan Roese <sr@denx.de>
+S: Maintained
+F: board/Marvell/mvebu_db-88f3720/
+F: include/configs/mvebu_db-88f3720.h
+F: configs/mvebu_db-88f3720_defconfig
--- /dev/null
+#
+# Copyright (C) 2016 Stefan Roese <sr@denx.de>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := board.o
--- /dev/null
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/soc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* IO expander I2C device */
+#define I2C_IO_EXP_ADDR 0x22
+#define I2C_IO_CFG_REG_0 0x6
+#define I2C_IO_DATA_OUT_REG_0 0x2
+#define I2C_IO_REG_0_SATA_OFF 2
+#define I2C_IO_REG_0_USB_H_OFF 1
+
+int board_early_init_f(void)
+{
+ /* Nothing to do (yet), perhaps later some pin-muxing etc */
+
+ return 0;
+}
+
+int board_init(void)
+{
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
+
+/* Board specific AHCI / SATA enable code */
+int board_ahci_enable(void)
+{
+ struct udevice *dev;
+ int ret;
+ u8 buf[8];
+
+ /* Configure IO exander PCA9555: 7bit address 0x22 */
+ ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev);
+ if (ret) {
+ printf("Cannot find PCA9555: %d\n", ret);
+ return 0;
+ }
+
+ ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to read IO expander value via I2C\n");
+ return -EIO;
+ }
+
+ /*
+ * Enable SATA power via IO expander connected via I2C by setting
+ * the corresponding bit to output mode to enable power for SATA
+ */
+ buf[0] &= ~(1 << I2C_IO_REG_0_SATA_OFF);
+ ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to set IO expander via I2C\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+/* Board specific xHCI enable code */
+int board_xhci_enable(void)
+{
+ struct udevice *dev;
+ int ret;
+ u8 buf[8];
+
+ /* Configure IO exander PCA9555: 7bit address 0x22 */
+ ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, &dev);
+ if (ret) {
+ printf("Cannot find PCA9555: %d\n", ret);
+ return 0;
+ }
+
+ printf("Enable USB VBUS\n");
+
+ /*
+ * Read configuration (direction) and set VBUS pin as output
+ * (reset pin = output)
+ */
+ ret = dm_i2c_read(dev, I2C_IO_CFG_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to read IO expander value via I2C\n");
+ return -EIO;
+ }
+ buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF);
+ ret = dm_i2c_write(dev, I2C_IO_CFG_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to set IO expander via I2C\n");
+ return -EIO;
+ }
+
+ /* Read VBUS output value and disable it */
+ ret = dm_i2c_read(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to read IO expander value via I2C\n");
+ return -EIO;
+ }
+ buf[0] &= ~(1 << I2C_IO_REG_0_USB_H_OFF);
+ ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to set IO expander via I2C\n");
+ return -EIO;
+ }
+
+ /*
+ * Required delay for configuration to settle - must wait for
+ * power on port is disabled in case VBUS signal was high,
+ * required 3 seconds delay to let VBUS signal fully settle down
+ */
+ mdelay(3000);
+
+ /* Enable VBUS power: Set output value of VBUS pin as enabled */
+ buf[0] |= (1 << I2C_IO_REG_0_USB_H_OFF);
+ ret = dm_i2c_write(dev, I2C_IO_DATA_OUT_REG_0, buf, 1);
+ if (ret) {
+ printf("Failed to set IO expander via I2C\n");
+ return -EIO;
+ }
+
+ mdelay(500); /* required delay to let output value settle */
+
+ return 0;
+}
--- /dev/null
+CONFIG_ARM=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_MVEBU_DB_88F3720=y
+CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db"
+CONFIG_AHCI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_BLOCK_CACHE=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_MISC=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHYLIB=y
+CONFIG_MVEBU_COMPHY_SUPPORT=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_MVEBU_A3700_UART=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=25804800
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_MVEBU_A3700_UART=y
+CONFIG_MVEBU_A3700_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
--- /dev/null
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _CONFIG_MVEBU_DB_88F3720_H
+#define _CONFIG_MVEBU_DB_88F3720_H
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+#define CONFIG_ARCH_EARLY_INIT_R
+
+#define CONFIG_SYS_TEXT_BASE 0x00000000
+
+/* additions for new ARM relocation support */
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#define CONFIG_NR_DRAM_BANKS 1
+
+/* auto boot */
+#define CONFIG_PREBOOT
+
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
+ 115200, 230400, 460800, 921600 }
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_INITRD_TAG /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
+
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */
+#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
+#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
+#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
+#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
+
+#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
+#define CONFIG_SYS_ALT_MEMTEST
+
+/* End of 16M scrubbed by training in bootrom */
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
+
+/*
+ * I2C
+ */
+#define CONFIG_I2C_MV
+#define CONFIG_SYS_I2C_SLAVE 0x0
+
+/*
+ * SPI Flash configuration
+ */
+#define CONFIG_ENV_SPI_BUS 0
+#define CONFIG_ENV_SPI_CS 0
+
+/* SPI NOR flash default params, used by sf commands */
+#define CONFIG_SF_DEFAULT_SPEED 1000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+
+/* Environment in SPI NOR flash */
+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
+#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
+#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
+
+/*
+ * Ethernet Driver configuration
+ */
+#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
+#define CONFIG_ARP_TIMEOUT 200
+#define CONFIG_NET_RETRY_COUNT 50
+
+/* USB 2.0 */
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
+/* USB 3.0 */
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3
+
+#define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \
+ CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS)
+
+/* USB ethernet */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_MCS7830
+#define CONFIG_USB_ETHER_RTL8152
+#define CONFIG_USB_ETHER_SMSC95XX
+
+/*
+ * SATA/SCSI/AHCI configuration
+ */
+#define CONFIG_SCSI
+#define CONFIG_SCSI_AHCI
+#define CONFIG_SCSI_AHCI_PLAT
+#define CONFIG_LIBATA
+#define CONFIG_LBA48
+#define CONFIG_SYS_64BIT_LBA
+
+#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
+#define CONFIG_SYS_SCSI_MAX_LUN 1
+#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
+ CONFIG_SYS_SCSI_MAX_LUN)
+
+#define CONFIG_SUPPORT_VFAT
+
+/* DISK Partition support */
+#define CONFIG_EFI_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MAC_PARTITION
+#define CONFIG_ISO_PARTITION /* Experimental */
+
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+#endif /* _CONFIG_MVEBU_DB_88F3720_H */
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