]> git.sur5r.net Git - u-boot/commitdiff
[ppc] Fix build breakage for all non-4xx PowerPC variants.
authorRafal Jaworowski <raj@semihalf.com>
Fri, 22 Jun 2007 12:58:04 +0000 (14:58 +0200)
committerRafal Jaworowski <raj@semihalf.com>
Fri, 22 Jun 2007 12:58:04 +0000 (14:58 +0200)
- adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
- minor 4xx cleanup

23 files changed:
cpu/74xx_7xx/start.S
cpu/mpc5xx/start.S
cpu/mpc5xxx/start.S
cpu/mpc8220/start.S
cpu/mpc824x/start.S
cpu/mpc8260/start.S
cpu/mpc83xx/start.S
cpu/mpc85xx/start.S
cpu/mpc86xx/start.S
cpu/mpc8xx/start.S
cpu/ppc4xx/start.S
include/74xx_7xx.h
include/mpc5xx.h
include/mpc5xxx.h
include/mpc8220.h
include/mpc824x.h
include/mpc8260.h
include/mpc83xx.h
include/mpc85xx.h
include/mpc86xx.h
include/mpc8xx.h
include/ppc4xx.h
include/ppc_asm.tmpl

index 11430388f50213a35581a3a039d01e35a81c6a79..b5834b91e3e054ef4506777b9b8f1fa2e536a27d 100644 (file)
@@ -125,7 +125,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -143,7 +143,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 087435e5bee225b9da94a6371b4c8fe42e861843..95728373fbd723f7674c5a762717fef6f7ef651a 100644 (file)
@@ -210,7 +210,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -228,7 +228,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 3936b5551f3c11d33437c755083dfccd4a6fc82a..9b1bd48c7338299dfd98ecd5c4b81b7ddb70db61 100644 (file)
@@ -208,7 +208,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -227,7 +227,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 52332023ec536b4946f41636e6ad10cb900903a4..b5145ca035d37f0c04e5ff59f994bf61e7fd1e87 100644 (file)
@@ -169,7 +169,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -188,7 +188,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16     /* copy EE bit from saved MSR */
index 9ff052c3b0ea2f5457e49d36a291b8b70fc02f97..784edc36a0c8b433ed58e735089e32e54c27805b 100644 (file)
@@ -220,7 +220,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = EXC_OFF_ALIGN
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -238,7 +238,7 @@ Alignment:
 /* Program check exception */
        . = EXC_OFF_PROGRAM
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 2e93bbbb8643df0de8a336b965eb0a08459e8942..bc55b58ad248e00885f44ac129f56d57f0ccbb7e 100644 (file)
@@ -279,7 +279,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -298,7 +298,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 6ee9ec96c97b888b812871a43e440a2aa92300fb..496c8a5861baaa1f849a6c7151fe6b6ec212f2f6 100644 (file)
@@ -263,7 +263,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -282,7 +282,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 20c7ebc7238bee98e06fed91cd3ea60b1df3da03..77c155c5bdc7c78159fa8aa0463b8f95d446fd01 100644 (file)
@@ -457,7 +457,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x0600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -475,7 +475,7 @@ Alignment:
 /* Program check exception */
        . = 0x0700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 67c56db1a37499d572c5190ea82fbbeffe9b60d2..412745bdaeacf5921c44032d70b98beb4d9dc596 100644 (file)
@@ -116,7 +116,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -134,7 +134,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index 33a3f6c88e2cc96672e029a144dbb7f46d84565e..eca4b50626dce0f6ef3f175d9e23a9d4d85b6708 100644 (file)
@@ -224,7 +224,7 @@ _start_of_vectors:
 /* Alignment exception. */
        . = 0x600
 Alignment:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        mfspr   r4,DAR
        stw     r4,_DAR(r21)
        mfspr   r5,DSISR
@@ -242,7 +242,7 @@ Alignment:
 /* Program check exception */
        . = 0x700
 ProgramCheck:
-       EXCEPTION_PROLOG
+       EXCEPTION_PROLOG(SRR0, SRR1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
        li      r20,MSR_KERNEL
        rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
index a46197dde98cb8563efa03346cda6f98a86bafca..dfe813c3f456866a91db946d704cfb6fae34ec0c 100644 (file)
@@ -60,7 +60,6 @@
  *  address and (s)dram will be positioned at address 0
  */
 #include <config.h>
-#include <mpc8xx.h>
 #include <ppc4xx.h>
 #include <version.h>
 
index ba73bae9e5f8470f979c01490c978d2491b9a144..4a03cecb5917c28d9756c5cffeeb7cf6deabb5d4 100644 (file)
@@ -34,6 +34,7 @@
  * Exception offsets (PowerPC standard)
  */
 #define EXC_OFF_SYS_RESET        0x0100      /* default system reset offset */
+#define _START_OFFSET          EXC_OFF_SYS_RESET
 
 /*----------------------------------------------------------------
  * l2cr values
index 7508f6df20e3a532f75df26800ca77ee418bf05b..e9b08a0dc7230e5292307ef3b64b9ca09a125161 100644 (file)
@@ -36,6 +36,7 @@
  * Exception offsets (PowerPC standard)
  */
 #define EXC_OFF_SYS_RESET      0x0100  /* System reset                         */
+#define _START_OFFSET          EXC_OFF_SYS_RESET
 
 /*-----------------------------------------------------------------------
  * ISB bit in IMMR to set internal memory map
index 089aa1322b84e9b0e9b2a7ecfbdab98967fbf6a0..a4581a3e6bb818cd506c31d8c1c2d53de43e8a8d 100644 (file)
@@ -39,6 +39,7 @@
 
 /* Exception offsets (PowerPC standard) */
 #define EXC_OFF_SYS_RESET      0x0100
+#define _START_OFFSET          EXC_OFF_SYS_RESET
 
 /* useful macros for manipulating CSx_START/STOP */
 #if defined(CONFIG_MGT5100)
index ff7acc6d3ab678e8c6da6b74f0a1857db848d8b9..d3b1457f9c5d104735d373e80c912c47e0911b8a 100644 (file)
@@ -35,6 +35,7 @@
 
 /* Exception offsets (PowerPC standard) */
 #define EXC_OFF_SYS_RESET   0x0100
+#define _START_OFFSET  EXC_OFF_SYS_RESET
 
 /* Internal memory map */
 /* MPC8220 Internal Register MMAP */
index 30fc795382f15e666ff0c1529dfbf5ef3e254584..4bd88634819540aff321e0b172d1a07bfa9242ee 100644 (file)
 #define EXC_OFF_JMDDI          0x1600  /* Java Mode denorm detect Interr -- WTF??*/
 #define EXC_OFF_RMTE           0x2000  /* Run Mode or Trace Exception */
 
+#define _START_OFFSET          EXC_OFF_SYS_RESET
+
 #define MAP_A_CONFIG_ADDR_HIGH 0x8000  /* Upper half of CONFIG_ADDR for Map A */
 #define MAP_A_CONFIG_ADDR_LOW  0x0CF8  /* Lower half of CONFIG_ADDR for Map A */
 #define MAP_A_CONFIG_DATA_HIGH 0x8000  /* Upper half of CONFIG_DAT for Map A */
index d9dd92d9a5e876b5ef0dc6f2d3ad68a4edd1ebc2..b61218ccc29c9a2f0fce8fd156cccd1cd7a6ff59 100644 (file)
@@ -53,7 +53,7 @@
  * Exception offsets (PowerPC standard)
  */
 #define EXC_OFF_SYS_RESET      0x0100  /* System reset                 */
-
+#define _START_OFFSET          EXC_OFF_SYS_RESET
 
 /*-----------------------------------------------------------------------
  * BCR - Bus Configuration Register                                     4-25
index 60fc214b3e224658274886ead3348bf2c78b6a6d..cbf41c3a9394453b4702857964229ae1ced70aa3 100644 (file)
@@ -25,6 +25,7 @@
 /* System reset offset (PowerPC standard)
  */
 #define EXC_OFF_SYS_RESET              0x0100
+#define        _START_OFFSET                   EXC_OFF_SYS_RESET
 
 /* IMMRBAR - Internal Memory Register Base Address
  */
index a4d99b2a165074d1f654fa32c9dff63a891ddd3b..6fbd50457c44684c16e098b826064628a484456b 100644 (file)
@@ -8,6 +8,7 @@
 #define __MPC85xx_H__
 
 #define EXC_OFF_SYS_RESET      0x0100  /* System reset */
+#define        _START_OFFSET           EXC_OFF_SYS_RESET
 
 #if defined(CONFIG_E500)
 #include <e500.h>
index 673bfed16e9832054835420e7e7d3ff4f5f3be53..9fd349af986b2634e93eedb7c1fcc9df01e6120e 100644 (file)
@@ -8,7 +8,7 @@
 #define __MPC86xx_H__
 
 #define EXC_OFF_SYS_RESET      0x0100  /* System reset offset */
-
+#define _START_OFFSET          EXC_OFF_SYS_RESET
 
 /*
  * platform register addresses
index 29117589be9983db9d0114853d29d64fa6183c42..11305987f892e9785bba1e1dfa1e53beefee255f 100644 (file)
@@ -35,7 +35,7 @@
  * Exception offsets (PowerPC standard)
  */
 #define EXC_OFF_SYS_RESET      0x0100  /* System reset                         */
-
+#define _START_OFFSET          EXC_OFF_SYS_RESET
 
 /*-----------------------------------------------------------------------
  * SYPCR - System Protection Control Register                          11-9
index 8cead66ad1aae56573606dd0a5fdf0c7bc7826a6..ca241d2c13c7bd9a5e1d15c131fe7bcd81d93a17 100644 (file)
@@ -22,7 +22,8 @@
 #ifndef        __PPC4XX_H__
 #define __PPC4XX_H__
 
-#define _START_OFFSET 0x2100
+#define EXC_OFF_SYS_RESET      0x0100  /* System reset                         */
+#define _START_OFFSET          (EXC_OFF_SYS_RESET + 0x2000)
 
 #if defined(CONFIG_440)
 #include <ppc440.h>
index ad027d61f40a452bca2bfac907832997151183f9..9f4029f2afca88d35c074f15c37d914b2328a020 100644 (file)
@@ -274,7 +274,7 @@ label:                                                      \
 #define CRIT_EXCEPTION(n, label, hdlr)                         \
        . = n;                                                  \
 label:                                                         \
-       EXCEPTION_PROLOG(csrr0, csrr1);                         \
+       EXCEPTION_PROLOG(CSRR0, CSRR1);                         \
        lwz     r3,GOT(transfer_to_handler);                    \
        mtlr    r3;                                             \
        addi    r3,r1,STACK_FRAME_OVERHEAD;                     \