board: advantech: dms-ba16: fix AR8033 reset timing issue

Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>

diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index 8aa7ff1659d968119bc66275b5b884664d399dad..75b0bbc2ccff354ac83efd7fc59c400018293bb9 100644 (file)
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -103,8 +103,9 @@ static void setup_iomux_enet(void)
 
        /* Reset AR8033 PHY */
        gpio_direction_output(IMX_GPIO_NR(1, 28), 0);
-       udelay(500);
+       mdelay(10);
        gpio_set_value(IMX_GPIO_NR(1, 28), 1);
+       mdelay(1);
 }
 
 static iomux_v3_cfg_t const usdhc2_pads[] = {