arm: psci: make psci usable on single core socs

PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.

Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 5156a15d110cbc2b10d65f7e3acd0bf2928b813c..e3c8aa2e6131b9af7d51333152bb119ba837a3a4 100644 (file)
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -7,25 +7,19 @@
 #include <common.h>
 #include <asm/psci.h>
 #include <asm/system.h>
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 #include <asm/armv8/sec_firmware.h>
-#endif
 
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 int psci_update_dt(void *fdt)
 {
-#ifdef CONFIG_MP
-#if defined(CONFIG_ARMV8_PSCI) || defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
-
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
        /*
         * If the PSCI in SEC Firmware didn't work, avoid to update the
         * device node of PSCI. But still return 0 instead of an error
         * number to support detecting PSCI dynamically and then switching
         * the SMP boot method between PSCI and spin-table.
         */
-       if (sec_firmware_support_psci_version() == 0xffffffff)
+       if (sec_firmware_support_psci_version() == PSCI_INVALID_VER)
                return 0;
-#endif
        fdt_psci(fdt);
 
 #if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_ARMV8_SECURE_BASE)
@@ -34,7 +28,6 @@ int psci_update_dt(void *fdt)
                        __secure_end - __secure_start);
 #endif
 
-#endif
-#endif
        return 0;
 }
+#endif

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index c24f3f173c0096a55c361e4b4103bef5152441dc..bb029608bf2499817da7770a6954bc649a42cd49 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -15,18 +15,14 @@
 #include <asm/arch/soc.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/speed.h>
-#ifdef CONFIG_MP
 #include <asm/arch/mp.h>
-#endif
 #include <efi_loader.h>
 #include <fm_eth.h>
 #include <fsl-mc/fsl_mc.h>
 #ifdef CONFIG_FSL_ESDHC
 #include <fsl_esdhc.h>
 #endif
-#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 #include <asm/armv8/sec_firmware.h>
-#endif
 #ifdef CONFIG_SYS_FSL_DDR
 #include <fsl_ddr.h>
 #endif
@@ -475,13 +471,19 @@ int cpu_eth_init(bd_t *bis)
        return error;
 }
 
-int arch_early_init_r(void)
+static inline int check_psci(void)
 {
-#ifdef CONFIG_MP
-       int rv = 1;
-       u32 psci_ver = 0xffffffff;
-#endif
+       unsigned int psci_ver;
 
+       psci_ver = sec_firmware_support_psci_version();
+       if (psci_ver == PSCI_INVALID_VER)
+               return 1;
+
+       return 0;
+}
+
+int arch_early_init_r(void)
+{
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
        u32 svr_dev_id;
        /*
@@ -495,18 +497,13 @@ int arch_early_init_r(void)
 #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR)
        erratum_a009942_check_cpo();
 #endif
-#ifdef CONFIG_MP
-#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
-       defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
-       /* Check the psci version to determine if the psci is supported */
-       psci_ver = sec_firmware_support_psci_version();
-#endif
-       if (psci_ver == 0xffffffff) {
-               rv = fsl_layerscape_wake_seconday_cores();
-               if (rv)
+       if (check_psci()) {
+               debug("PSCI: PSCI does not exist.\n");
+
+               /* if PSCI does not exist, boot secondary cores here */
+               if (fsl_layerscape_wake_seconday_cores())
                        printf("Did not wake secondary cores\n");
        }
-#endif
 
 #ifdef CONFIG_SYS_HAS_SERDES
        fsl_serdes_init();

diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index ec9cf40241a14e4c817a2bd6734957291a00f9ee..4afa3ad8b1dcefc6deb6115b464998fd897c9b72 100644 (file)
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -227,7 +227,7 @@ unsigned int sec_firmware_support_psci_version(void)
        if (sec_firmware_addr & SEC_FIRMWARE_RUNNING)
                return _sec_firmware_support_psci_version();
 
-       return 0xffffffff;
+       return PSCI_INVALID_VER;
 }
 #endif
 

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
index d0832b54bc546b975ff4a1fe1ceae160bd5a64fc..fd3f851b53737a07f8b662e4e6f076ee7a2fcdcd 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
@@ -31,7 +31,11 @@ extern u64 __spin_table[];
 extern u64 __real_cntfrq;
 extern u64 *secondary_boot_code;
 extern size_t __secondary_boot_code_size;
+#ifdef CONFIG_MP
 int fsl_layerscape_wake_seconday_cores(void);
+#else
+static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; }
+#endif
 void *get_spin_tbl_addr(void);
 phys_addr_t determine_mp_bootpg(void);
 void secondary_boot_func(void);

diff --git a/arch/arm/include/asm/armv8/sec_firmware.h b/arch/arm/include/asm/armv8/sec_firmware.h
index bcdb1b0072046b45b1e5a99f4cc9e7ce35dad2d8..bc1d97d7a98fb5f74d7e09705dce7816b8478b03 100644 (file)
--- a/arch/arm/include/asm/armv8/sec_firmware.h
+++ b/arch/arm/include/asm/armv8/sec_firmware.h
@@ -7,12 +7,19 @@
 #ifndef __SEC_FIRMWARE_H_
 #define __SEC_FIRMWARE_H_
 
+#define PSCI_INVALID_VER               0xffffffff
+
 int sec_firmware_init(const void *, u32 *, u32 *);
 int _sec_firmware_entry(const void *, u32 *, u32 *);
 bool sec_firmware_is_valid(const void *);
 #ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
 unsigned int sec_firmware_support_psci_version(void);
 unsigned int _sec_firmware_support_psci_version(void);
+#else
+static inline unsigned int sec_firmware_support_psci_version(void)
+{
+       return PSCI_INVALID_VER;
+}
 #endif
 
 #endif /* __SEC_FIRMWARE_H_ */