ARM: DRA7xx: ctrl: Fix efuse register addresses

Efuse register addresses are wrongly programmed.
Fixing the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tom Rini <trini@ti.com>

diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index 7292161f3cbd15a803673e622650dc5d1eb59e56..ff08ef42479400a5697ba210c7b313ae9165a67c 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -447,10 +447,10 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = {
        .control_wkup_control_spare_r           = 0x4AE0C5B4,
        .control_wkup_control_spare_r_c0        = 0x4AE0C5B8,
        .control_srcomp_east_side_wkup          = 0x4AE0C5BC,
-       .control_efuse_1                        = 0x4AE0C5C0,
-       .control_efuse_2                        = 0x4AE0C5C4,
-       .control_efuse_3                        = 0x4AE0C5C8,
-       .control_efuse_4                        = 0x4AE0C5CC,
+       .control_efuse_1                        = 0x4AE0C5C8,
+       .control_efuse_2                        = 0x4AE0C5CC,
+       .control_efuse_3                        = 0x4AE0C5D0,
+       .control_efuse_4                        = 0x4AE0C5D4,
        .control_efuse_13                       = 0x4AE0C5F0,
 };