powerpc/85xx: Fix Wrong PCIe 3 virtual address on corenet_ds platforms

This patch fixes a wrong address define in corenet_ds.h (used by
P4080DS.h, P3041DS.h, P5020DS.h).

Since board/Freescale/corenet_ds/tlb.c does not use the
CONFIG_SYS_PCIE3_MEM_VIRT define (uses CONFIG_SYS_PCIE1_MEM_VIRT with a
fix offset instead) this has no effect to the functionality. But it may
be important for changes in the future?

Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de>
Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index bec8cd1ce15ed61e9f2a5d7ef0b52996f71d30e6..9be7f1f3fc47035b72a1e707c0ec2d3134a0461b 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -356,7 +356,7 @@
 #define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
 
 /* controller 3, Slot 1, tgtid 1, Base address 202000 */
-#define CONFIG_SYS_PCIE3_MEM_VIRT      0xe0000000
+#define CONFIG_SYS_PCIE3_MEM_VIRT      0xc0000000
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE3_MEM_BUS       0xe0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS      0xc40000000ull