#include "ehci.h"
+/* Check USB PHY clock valid */
+static int usb_phy_clk_valid(struct usb_ehci *ehci)
+{
+ if (!((in_be32(&ehci->control) & PHY_CLK_VALID) ||
+ in_be32(&ehci->prictrl))) {
+ printf("USB PHY clock invalid!\n");
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
/*
* Create the appropriate control structures to manage
* a new EHCI host controller.
udelay(1000); /* delay required for PHY Clk to appear */
#endif
out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
+ setbits_be32(&ehci->control, USB_EN);
} else {
-#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
- clrbits_be32(&ehci->control, UTMI_PHY_EN);
setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
+ clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
udelay(1000); /* delay required for PHY Clk to appear */
-#endif
+ if (!usb_phy_clk_valid(ehci))
+ return -EINVAL;
out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
}
- /* Enable interface. */
- setbits_be32(&ehci->control, USB_EN);
-
out_be32(&ehci->prictrl, 0x0000000c);
out_be32(&ehci->age_cnt_limit, 0x00000040);
out_be32(&ehci->sictrl, 0x00000001);