]> git.sur5r.net Git - u-boot/commitdiff
pci: Do not skip legacy IDE device configuration
authorBin Meng <bmeng.cn@gmail.com>
Sat, 16 May 2015 01:33:15 +0000 (09:33 +0800)
committerSimon Glass <sjg@chromium.org>
Thu, 4 Jun 2015 08:39:39 +0000 (02:39 -0600)
The legacy IDE device has a BAR4 (Bus Master Interface BAR) which
needs to be configured.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
drivers/pci/pci_auto.c

index 43965d8a2ac19a7ddc7ba38273fdd9bcc82c9e42..7c109832f6d827ee0173d26cef63ec5056aaef64 100644 (file)
@@ -20,8 +20,6 @@
 #define DEBUGF(x...)
 #endif /* DEBUG */
 
-#define        PCIAUTO_IDE_MODE_MASK           0x05
-
 /* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
 #ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE
 #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8
@@ -424,7 +422,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 {
        unsigned int sub_bus = PCI_BUS(dev);
        unsigned short class;
-       unsigned char prg_iface;
        int n;
 
        pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
@@ -460,17 +457,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 #endif
                break;
 
-       case PCI_CLASS_STORAGE_IDE:
-               pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prg_iface);
-               if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
-                       DEBUGF("PCI Autoconfig: Skipping legacy mode IDE controller\n");
-                       return sub_bus;
-               }
-
-               pciauto_setup_device(hose, dev, 6, hose->pci_mem,
-                       hose->pci_prefetch, hose->pci_io);
-               break;
-
        case PCI_CLASS_BRIDGE_CARDBUS:
                /*
                 * just do a minimal setup of the bridge,