#define SOCFPGA_UART0_ADDRESS 0xffc02000
 #define SOCFPGA_UART1_ADDRESS 0xffc03000
 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
+#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
 #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
 #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
 
 
 #define CONFIG_ENV_IS_NOWHERE
 
+/*
+ * L4 Watchdog
+ */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_HW_WATCHDOG_TIMEOUT_MS  2000
+#define CONFIG_DESIGNWARE_WATCHDOG
+#define CONFIG_DW_WDT_BASE             SOCFPGA_L4WD0_ADDRESS
+/* Clocks source frequency to watchdog timer */
+#define CONFIG_DW_WDT_CLOCK_KHZ                25000
+
+
 /*
  * SPL "Second Program Loader" aka Initial Software
  */
 /* Support for lib/libgeneric.o in SPL binary */
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 
+/* Support for watchdog */
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+
 #endif /* __CONFIG_H */