{
u8 i, j = 0;
for (i = 0x50; i < 0xB8; i += sizeof(u32))
- printf("%02x: 0x%08x %c", i, reg_read(CONFIG_DRIVER_SMC911X_BASE + i),
+ printf("%02x: 0x%08x %c", i,
+ smc911x_reg_read(CONFIG_DRIVER_SMC911X_BASE + i),
(j++ % 2 ? '\n' : ' '));
}
*/
static int do_eeprom_cmd(int cmd, u8 reg)
{
- if (reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY) {
+ if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY) {
printf("eeprom_cmd: busy at start (E2P_CMD = 0x%08x)\n",
- reg_read(E2P_CMD));
+ smc911x_reg_read(E2P_CMD));
return -1;
}
- reg_write(E2P_CMD, E2P_CMD_EPC_BUSY | cmd | reg);
+ smc911x_reg_write(E2P_CMD, E2P_CMD_EPC_BUSY | cmd | reg);
- while (reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY)
+ while (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY)
if (smsc_ctrlc()) {
printf("eeprom_cmd: timeout (E2P_CMD = 0x%08x)\n",
- reg_read(E2P_CMD));
+ smc911x_reg_read(E2P_CMD));
return -1;
}
static u8 read_eeprom_reg(u8 reg)
{
int ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_READ, reg);
- return (ret ? : reg_read(E2P_DATA));
+ return (ret ? : smc911x_reg_read(E2P_DATA));
}
/**
goto done;
/* write the eeprom reg */
- reg_write(E2P_DATA, value);
+ smc911x_reg_write(E2P_DATA, value);
ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_WRITE, reg);
if (ret)
goto done;
write_eeprom_reg(value, reg);
} else {
printf("Writing MAC register %02x with %08x\n", reg, value);
- reg_write(CONFIG_DRIVER_SMC911X_BASE + reg, value);
+ smc911x_reg_write(CONFIG_DRIVER_SMC911X_BASE + reg, value);
}
}
smc911x_reset();
/* Make sure we set EEDIO/EECLK to the EEPROM */
- if (reg_read(GPIO_CFG) & GPIO_CFG_EEPR_EN) {
- while (reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY)
+ if (smc911x_reg_read(GPIO_CFG) & GPIO_CFG_EEPR_EN) {
+ while (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY)
if (smsc_ctrlc()) {
- printf("init: timeout (E2P_CMD = 0x%08x)\n", reg_read(E2P_CMD));
+ printf("init: timeout (E2P_CMD = 0x%08x)\n",
+ smc911x_reg_read(E2P_CMD));
return 1;
}
- reg_write(GPIO_CFG, reg_read(GPIO_CFG) & ~GPIO_CFG_EEPR_EN);
+ smc911x_reg_write(GPIO_CFG, smc911x_reg_read(GPIO_CFG) & ~GPIO_CFG_EEPR_EN);
}
return 0;