x86: Add RAM bootstrap functionality

Add a parameter to the 32-bit entry to indicate if entry is from Real
Mode or not. If entry is from Real Mode, execute the destructive 'sizer'
routine to determine memory size as we are booting cold and running in
Flash. If not entering from Real Mode, we are executing a U-Boot image
from RAM and therefore the memory size is already known (and running
'sizer' will destroy the running image)

There are now two 32-bit entry points. The first is the 'in RAM' entry
point which exists at the start of the U-Boot binary image. As such,
you can load u-boot.bin in RAM and jump directly to the load address
without needing to calculate any offsets. The second entry point is
used by the real-to-protected mode switch

This patch also changes TEXT_BASE to 0x6000000 (in RAM). You can load
the resulting image at 0x6000000 and simple go 0x6000000 from the u-boot
prompt

Hopefully a later patch will completely elliminate any dependency on
TEXT_BASE like a relocatable linux kernel (perfect world)

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

diff --git a/arch/i386/cpu/start.S b/arch/i386/cpu/start.S
index 1980f1a7b7800405816a5e5c3be00499eb8b628b..3cea04b4ce37bd480ada911f610d9a800e9255b4 100644 (file)
--- a/arch/i386/cpu/start.S
+++ b/arch/i386/cpu/start.S
@@ -33,7 +33,27 @@
 .type _start, @function
 .globl _i386boot_start
 _i386boot_start:
+       /*
+        * This is the fail safe 32-bit bootstrap entry point. The
+        * following code is not executed from a cold-reset (actually, a
+        * lot of it is, but from real-mode after cold reset. It is
+        * repeated here to put the board into a state as close to cold
+        * reset as necessary)
+        */
+       cli
+       cld
+
+       /* Turn of cache (this might require a 486-class CPU) */
+       movl    %cr0, %eax
+       orl     $0x60000000,%eax
+       movl    %eax, %cr0
+       wbinvd
+
+       /* Tell 32-bit code it is being entered from an in-RAM copy */
+       movw    $0x0000, %bx
 _start:
+       /* This is the 32-bit cold-reset entry point */
+
        movl    $0x18,%eax      /* Load our segement registes, the
                                 * gdt have already been loaded by start16.S */
        movw    %ax,%fs
@@ -42,6 +62,18 @@ _start:
        movw    %ax,%es
        movw    %ax,%ss
 
+       /* Clear the interupt vectors */
+       lidt    blank_idt_ptr
+
+       /*
+        * Skip low-level board and memory initialization if not starting
+        * from cold-reset. This allows us to do a fail safe boot-strap
+        * into a new build of U-Boot from a known-good boot flash
+        */
+       movw    $0x0001, %ax
+       cmpw    %ax, %bx
+       jne     mem_init_ret
+
        /* We call a few functions in the board support package
         * since we have no stack yet we'll have to use %ebp
         * to store the return address */
@@ -138,3 +170,7 @@ stack_ok:
 die:   hlt
        jmp     die
        hlt
+
+blank_idt_ptr:
+       .word   0               /* limit */
+       .long   0               /* base */

diff --git a/arch/i386/cpu/start16.S b/arch/i386/cpu/start16.S
index 1ebb6bc8b6334f5db3af389b181c50f3d4666920..5e33aa1069c7b25652d422b7ec8d189dd37ec469 100644 (file)
--- a/arch/i386/cpu/start16.S
+++ b/arch/i386/cpu/start16.S
@@ -45,10 +45,8 @@ board_init16_ret:
        wbinvd
 
        /* load the descriptor tables */
-o32 cs lidt    idt_ptr
 o32 cs lgdt    gdt_ptr
 
-
        /* Now, we enter protected mode */
        movl    %cr0, %eax
        orl     $1,%eax
@@ -57,6 +55,8 @@ o32 cs        lgdt    gdt_ptr
        /* Flush the prefetch queue */
        jmp     ff
 ff:
+       /* Tell 32-bit code it is being entered from hard-reset */
+       movw    $0x0001, %bx
 
        /* Finally jump to the 32bit initialization code */
        movw    $code32start, %ax
@@ -68,10 +68,6 @@ code32start:
        .long   _start          /* offset */
        .word   0x10            /* segment */
 
-idt_ptr:
-       .word   0               /* limit */
-       .long   0               /* base */
-
 gdt_ptr:
        .word   0x30            /* limit (48 bytes = 6 GDT entries) */
        .long   BOOT_SEG + gdt  /* base */

diff --git a/board/eNET/config.mk b/board/eNET/config.mk
index dcde7fcedb21f83a22f0c43e28d8340ce61b326c..63a58fdc501a222e99d8e9ac568ead992f81221d 100644 (file)
--- a/board/eNET/config.mk
+++ b/board/eNET/config.mk
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-TEXT_BASE = 0x38040000
+TEXT_BASE = 0x06000000
 CFLAGS_common/dlmalloc.o += -Wa,--no-warn -fno-strict-aliasing
 PLATFORM_RELFLAGS += -fvisibility=hidden
 PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm

diff --git a/board/eNET/u-boot.lds b/board/eNET/u-boot.lds
index 0d740215ce95c8f053a6929c468ae597a7af8d67..7b0ffaa6cc85a2d2b0098da4956636c15dcae3d0 100644 (file)
--- a/board/eNET/u-boot.lds
+++ b/board/eNET/u-boot.lds
@@ -27,7 +27,7 @@ ENTRY(_start)
 
 SECTIONS
 {
-       . = 0x38040000;         /* Location of bootcode in flash */
+       . = 0x06000000;         /* Location of bootcode in flash */
        _i386boot_text_start = .;
        .text  : { *(.text); }
 
@@ -97,14 +97,13 @@ SECTIONS
         * at reset and the code have to fit.
         * The fff0 offset of resetvec is important, however.
         */
-
        . = 0xfffffe00;
-       .start32 : AT (0x3807fe00) { *(.start32); }
+       .start32 : AT (0x0603fe00) { *(.start32); }
 
        . = 0xf800;
-       .start16 : AT (0x3807f800) { *(.start16); }
+       .start16 : AT (0x0603f800) { *(.start16); }
 
        . = 0xfff0;
-       .resetvec : AT (0x3807fff0) { *(.resetvec); }
+       .resetvec : AT (0x0603fff0) { *(.resetvec); }
        _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) );
 }