]> git.sur5r.net Git - u-boot/commitdiff
Tegra30: fdt: Update DT files with I2C info for T30/Cardhu
authorTom Warren <twarren@nvidia.com>
Fri, 21 Dec 2012 22:59:15 +0000 (15:59 -0700)
committerTom Warren <twarren@nvidia.com>
Wed, 16 Jan 2013 20:40:08 +0000 (13:40 -0700)
Note that T30 does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
DVC_I2C is still used to designate the controller intended for
power control (PWR_I2C in the schematics). On Cardhu, it's used
to access the PMU and EEPROM, as well as the audio codec, temp
sensor, and fuel gauge devices from the OS.

Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/dts/tegra30.dtsi
board/nvidia/dts/tegra30-cardhu.dts

index f568d44601a40d603a7a3cd39ba4eea327ea3296..664c39719bb54dd2262b93d0ed3af75f0d9b9618 100644 (file)
@@ -2,4 +2,65 @@
 
 / {
        compatible = "nvidia,tegra30";
+
+       tegra_car: clock@60006000 {
+               compatible = "nvidia,tegra30-car", "nvidia,tegra20-car";
+               reg = <0x60006000 0x1000>;
+               #clock-cells = <1>;
+       };
+
+       clocks {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               osc: clock {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+               };
+       };
+
+       i2c@7000c000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C000 0x100>;
+               /* PERIPH_ID_I2C1, CLK_M */
+               clocks = <&tegra_car 12>;
+       };
+
+       i2c@7000c400 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C400 0x100>;
+               /* PERIPH_ID_I2C2, CLK_M */
+               clocks = <&tegra_car 54>;
+       };
+
+       i2c@7000c500 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C500 0x100>;
+               /* PERIPH_ID_I2C3, CLK_M */
+               clocks = <&tegra_car 67>;
+       };
+
+       i2c@7000c700 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000C700 0x100>;
+               /* PERIPH_ID_I2C4, CLK_M */
+               clocks = <&tegra_car 103>;
+       };
+
+       i2c@7000d000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
+               reg = <0x7000D000 0x100>;
+               /* PERIPH_ID_I2C_DVC, CLK_M */
+               clocks = <&tegra_car 47>;
+       };
 };
index 30125343dd05524a2b3def978bf7e068707256ed..60b91b4d175ea70b6bc2b1d766e6b88378ffa584 100644 (file)
@@ -7,8 +7,49 @@
        model = "NVIDIA Cardhu";
        compatible = "nvidia,cardhu", "nvidia,tegra30";
 
+       aliases {
+               i2c0 = "/i2c@7000d000";
+               i2c1 = "/i2c@7000c000";
+               i2c2 = "/i2c@7000c400";
+               i2c3 = "/i2c@7000c500";
+               i2c4 = "/i2c@7000c700";
+       };
+
        memory {
                device_type = "memory";
                reg = <0x80000000 0x40000000>;
        };
+
+       clocks {
+               clk_32k: clk_32K {
+                       clock-frequency = <32768>;
+               };
+               osc {
+                       clock-frequency = <12000000>;
+               };
+       };
+
+       clock@60006000 {
+               clocks = <&clk_32k &osc>;
+       };
+
+       i2c@7000c000 {
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c400 {
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c500 {
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000c700 {
+               clock-frequency = <100000>;
+       };
+
+       i2c@7000d000 {
+               clock-frequency = <100000>;
+       };
 };