]> git.sur5r.net Git - u-boot/commitdiff
kconfig: armv8: move armv8 sec_firmware CONFIG_* to Kconfig
authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Mon, 16 Jan 2017 09:31:47 +0000 (17:31 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 18 Jan 2017 17:35:53 +0000 (09:35 -0800)
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[York S: clean up scripts/config_whitelist.txt]
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/Kconfig
arch/arm/cpu/armv8/Makefile
arch/arm/cpu/armv8/sec_firmware_asm.S
include/configs/ls1043ardb.h
include/configs/ls1046ardb.h
scripts/config_whitelist.txt

index 472b2ba188288c512d0077026a42fc2e1328bb69..7ef9c2fc523963531e9023aa884fc199d08b81e2 100644 (file)
@@ -39,6 +39,39 @@ config ARMV8_SPIN_TABLE
            - Reserve the code for the spin-table and the release address
              via a /memreserve/ region in the Device Tree.
 
+menu "ARMv8 secure monitor firmware"
+config ARMV8_SEC_FIRMWARE_SUPPORT
+       bool "Enable ARMv8 secure monitor firmware framework support"
+       select OF_LIBFDT
+       select FIT
+       help
+         This framework is aimed at making secure monitor firmware load
+         process brief.
+         Note: Only FIT format image is supported.
+         You should prepare and provide the below information:
+           - Address of secure firmware.
+           - Address to hold the return address from secure firmware.
+           - Secure firmware FIT image related information.
+             Such as: SEC_FIRMWARE_FIT_IMAGE and SEC_FIRMEWARE_FIT_CNF_NAME
+           - The target exception level that secure monitor firmware will
+             return to.
+
+config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
+       bool "Enable ARMv8 secure monitor firmware framework support for SPL"
+       select SPL_OF_LIBFDT
+       select SPL_FIT
+       help
+         Say Y here to support this framework in SPL phase.
+
+config ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
+       bool "ARMv8 secure monitor firmware ERET address byteorder swap"
+       depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT
+       help
+         Say Y here when the endianness of the register or memory holding the
+         Secure firmware exception return address is different with core's.
+
+endmenu
+
 config PSCI_RESET
        bool "Use PSCI for reset and shutdown"
        default y
index 28ba7862072a2cc165c87bea0877e9422a76c520..1f1de4aa9a2b398a0d8cb1fbe9b678028adf2832 100644 (file)
@@ -19,7 +19,7 @@ obj-y += cpu-dt.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
 endif
-obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
+obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
 
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
 obj-$(CONFIG_S32V234) += s32v234/
index 5ed3677f5554abb8f09953d0af09540e78f7ef79..3275e95c587f8a311e9e3acf6905dc43c67a2dc9 100644 (file)
@@ -23,12 +23,12 @@ WEAK(_sec_firmware_entry)
        /* Set exception return address hold pointer */
         adr    x4, 1f
         mov    x3, x4
-#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
         rev    w3, w3
 #endif
         str    w3, [x1]
         lsr    x3, x4, #32
-#ifdef SEC_FIRMWARE_ERET_ADDR_REVERT
+#ifdef CONFIG_ARMV8_SEC_FIRMWARE_ERET_ADDR_REVERT
         rev    w3, w3
 #endif
         str    w3, [x2]
index 36df3316fc24ab4a9a17b1c4cd9f4c9fdf309e65..3657f21dfbead6ba1bd87f403f6688aea15f8cb1 100644 (file)
@@ -10,9 +10,6 @@
 #include "ls1043a_common.h"
 
 #if defined(CONFIG_FSL_LS_PPA)
-#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
-#define SEC_FIRMWARE_ERET_ADDR_REVERT
-
 #define CONFIG_SYS_LS_PPA_FW_IN_XIP
 #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
 #define        CONFIG_SYS_LS_PPA_FW_ADDR       0x60500000
index 2bfd83c758f61efa8382f9899b21f25310effe87..08c5441807bd7fbd676ea85e0a9aa7637c741c08 100644 (file)
 #include "ls1046a_common.h"
 
 #if defined(CONFIG_FSL_LS_PPA)
-#define CONFIG_ARMV8_PSCI
-#define CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
-#define CONFIG_SYS_LS_PPA_DRAM_BLOCK_MIN_SIZE          (1UL * 1024 * 1024)
-
 #define CONFIG_SYS_LS_PPA_FW_IN_XIP
 #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
 #define        CONFIG_SYS_LS_PPA_FW_ADDR       0x40500000
index 00ee3f10cdae4d866787263e60f6dc7c6b964009..da19e8ebd3d8f447bf4b2533e0c7e4787622c65f 100644 (file)
@@ -181,7 +181,6 @@ CONFIG_ARMV7_PSCI_1_0
 CONFIG_ARMV7_SECURE_BASE
 CONFIG_ARMV7_SECURE_MAX_SIZE
 CONFIG_ARMV7_SECURE_RESERVE_SIZE
-CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 CONFIG_ARMV8_SWITCH_TO_EL1
 CONFIG_ARM_ARCH_CP15_ERRATA
 CONFIG_ARM_ASM_UNIFIED