select OF_SEPARATE
select DM
select DM_SERIAL
+ select DM_SPI
+ select DM_SPI_FLASH
select SPL_DM
select SPL_OF_CONTROL
+ select SPL_SIMPLE_BUS
config TARGET_DEVKIT3250
bool "Support devkit3250"
stdout-path = "serial0:115200n8";
};
+ aliases {
+ spi0 = &spi0;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x80000000>; /* 2 GB */
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
+ u-boot,dm-pre-reloc;
spi-flash@0 {
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,m25p128", "jedec,spi-nor";
soc {
compatible = "marvell,armada380-mbus", "simple-bus";
+ u-boot,dm-pre-reloc;
#address-cells = <2>;
#size-cells = <1>;
controller = <&mbusc>;
internal-regs {
compatible = "simple-bus";
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
stdout-path = "serial0:115200n8";
};
+ aliases {
+ spi0 = &spi0;
+ };
+
memory {
device_type = "memory";
/*
spi0: spi@10600 {
status = "okay";
+ u-boot,dm-pre-reloc;
spi-flash@0 {
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13", "jedec,spi-nor";
soc {
compatible = "marvell,armadaxp-mbus", "simple-bus";
+ u-boot,dm-pre-reloc;
bootrom {
compatible = "marvell,bootrom";
* SPI Flash configuration
*/
#ifdef CONFIG_CMD_SF
-#define CONFIG_HARD_SPI 1
-#define CONFIG_KIRKWOOD_SPI 1
+#define CONFIG_KIRKWOOD_SPI
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif
#endif
#endif
+/* Needed for SPI NOR booting in SPL */
+#define CONFIG_DM_SEQ_ALIAS 1
+
/*
* Ethernet Driver configuration
*/
#define MVEBU_SDRAM_SCRATCH (MVEBU_REGISTER(0x01504))
#define MVEBU_L2_CACHE_BASE (MVEBU_REGISTER(0x08000))
#define CONFIG_SYS_PL310_BASE MVEBU_L2_CACHE_BASE
-#define MVEBU_SPI_BASE (MVEBU_REGISTER(0x10600))
#define MVEBU_TWSI_BASE (MVEBU_REGISTER(0x11000))
#define MVEBU_MPP_BASE (MVEBU_REGISTER(0x18000))
#define MVEBU_GPIO0_BASE (MVEBU_REGISTER(0x18100))
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_BUS 0
#define CONFIG_SPL_SPI_CS 0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif