ppc4xx: DU405 maintenance fix

-strip unused features
-fix resetting phy

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
index 8a87d5549ee0cc17a82ac687b1ceca203524af0b..3bb34fd8265d86bb252851298900414bda7e7d91 100644 (file)
--- a/board/esd/du405/du405.c
+++ b/board/esd/du405/du405.c
@@ -191,10 +191,16 @@ int checkboard (void)
        *(volatile unsigned char *) FPGA_MODE_REG = 0xff;       /* reset high active */
        *(volatile unsigned char *) FPGA_MODE_REG = 0x00;       /* low again */
 
+       return 0;
+}
+
+void reset_phy(void)
+{
+#if defined(CONFIG_LXT971_NO_SLEEP)
+
        /*
         * Disable sleep mode in LXT971
         */
        lxt971_no_sleep();
-
-       return 0;
+#endif
 }

diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index 1d20efea00d4b80b19fa13dd6bddf1c64f40887b..d1edd244b4ef71174a159fb62516c410df513c23 100644 (file)
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -32,8 +32,6 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_IDENT_STRING     " $Name:  $"
-
 #define CONFIG_405GP           1       /* This is a PPC405 CPU         */
 #define CONFIG_4xx             1       /* ...member of PPC4xx family   */
 #define CONFIG_DU405           1       /* ...on a DU405 board          */
@@ -49,8 +47,6 @@
 #undef CONFIG_BOOTARGS
 #define CONFIG_BOOTCOMMAND     "bootm fff00000"
 
-#define CONFIG_PREBOOT                  /* enable preboot variable      */
-
 #define CONFIG_LOADS_ECHO      1       /* echo on for serial download  */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 
@@ -58,7 +54,9 @@
 #define CONFIG_MII             1       /* MII PHY management           */
 #define CONFIG_PHY_ADDR                0       /* PHY address                  */
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
-
+#define CONFIG_RESET_PHY_R      1       /* use reset_phy() to disable phy sleep mode */
+#define CONFIG_NET_MULTI       1
+#undef  CONFIG_HAS_ETH1
 
 /*
  * BOOTP options
@@ -74,14 +72,13 @@
  */
 #include <config_cmd_default.h>
 
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 #define CONFIG_CMD_IDE
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_EEPROM
-
+#define CONFIG_CMD_I2C
 
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
@@ -214,6 +211,7 @@
 /*-----------------------------------------------------------------------
  * I2C EEPROM (CAT24WC08) for environment
  */
+#define CONFIG_I2C_CMD_TREE     1
 #define CONFIG_HARD_I2C                        /* I2c with hardware support */
 #define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE           0x7F