]> git.sur5r.net Git - u-boot/commitdiff
arm, davinci, da8xx: add cpuinfo
authorHeiko Schocher <hs@denx.de>
Wed, 14 Sep 2011 19:59:39 +0000 (19:59 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 30 Sep 2011 20:00:59 +0000 (22:00 +0200)
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
arch/arm/cpu/arm926ejs/davinci/cpu.c

index b705dfd3181a6b1fa4f20ae1e200aeb0e0ea5653..02819f6f743666049e8c2ff235ed3f8767a0c945 100644 (file)
@@ -115,7 +115,18 @@ int clk_get(enum davinci_clk_ids id)
 out:
        return pll_out;
 }
-#endif /* CONFIG_SOC_DA8XX */
+#ifdef CONFIG_DISPLAY_CPUINFO
+int print_cpuinfo(void)
+{
+       printf("Cores: ARM %d MHz",
+                       clk_get(DAVINCI_ARM_CLKID) / 1000000);
+       printf("\nDDR:   %d MHz\n",
+                       /* DDR PHY uses an x2 input clock */
+                       clk_get(0x10001) / 1000000);
+       return 0;
+}
+#endif
+#else /* CONFIG_SOC_DA8XX */
 
 #ifdef CONFIG_DISPLAY_CPUINFO
 
@@ -194,7 +205,8 @@ unsigned int davinci_arm_clk_get()
        return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000;
 }
 #endif
-#endif
+#endif /* CONFIG_DISPLAY_CPUINFO */
+#endif /* !CONFIG_SOC_DA8XX */
 
 /*
  * Initializes on-chip ethernet controllers.