]> git.sur5r.net Git - u-boot/commitdiff
mx6: Remove duplication of iomuxc structure
authorFabio Estevam <fabio.estevam@freescale.com>
Wed, 9 Jul 2014 20:59:54 +0000 (17:59 -0300)
committerStefano Babic <sbabic@denx.de>
Wed, 23 Jul 2014 10:25:41 +0000 (12:25 +0200)
There is no need to keep iomuxc_base_regs structure as it serves the exact same
purpose of the iomuxc structure, which is to provide access to the GPR
registers.

The additional fields of iomuxc_base_regs are not used. Other advantage of
'iomuxc' is that it has a shorter name and the variable declarations can fit
into a single line.

So remove iomuxc_base_regs structure and use iomuxc instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
arch/arm/imx-common/sata.c
arch/arm/include/asm/arch-mx6/imx-regs.h
board/boundary/nitrogen6x/nitrogen6x.c
board/freescale/mx6slevk/mx6slevk.c
board/gateworks/gw_ventana/gw_ventana.c
board/solidrun/hummingboard/hummingboard.c

index c10dd28f61af5502fc97035ff094bdf5d5784e4b..d174a463f88a70ed8d646a0e1c36e9f833d64e68 100644 (file)
@@ -12,8 +12,7 @@
 
 int setup_sata(void)
 {
-       struct iomuxc_base_regs *const iomuxc_regs
-               = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+       struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
        int ret;
 
        if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
index df87123ad3e4b80521f70ef609c659d46227057b..782d9c41fc7e0f70cc54ceef7b07e8a418f214bb 100644 (file)
@@ -764,15 +764,6 @@ struct anatop_regs {
 #define ANATOP_PFD_CLKGATE_SHIFT(n)    (7+((n)*8))
 #define ANATOP_PFD_CLKGATE_MASK(n)     (1<<ANATOP_PFD_CLKGATE_SHIFT(n))
 
-struct iomuxc_base_regs {
-       u32     gpr[14];        /* 0x000 */
-       u32     obsrv[5];       /* 0x038 */
-       u32     swmux_ctl[197]; /* 0x04c */
-       u32     swpad_ctl[250]; /* 0x360 */
-       u32     swgrp[26];      /* 0x748 */
-       u32     daisy[104];     /* 0x7b0..94c */
-};
-
 struct wdog_regs {
        u16     wcr;    /* Control */
        u16     wsr;    /* Service */
index 84294db859fac0fe7bc09bb245d7a51938f6ce3a..60a09f4bb3e85cb7833c2900ecc1f53aab79c7c7 100644 (file)
@@ -644,8 +644,7 @@ int overwrite_console(void)
 
 int board_init(void)
 {
-       struct iomuxc_base_regs *const iomuxc_regs
-               = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+       struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
        clrsetbits_le32(&iomuxc_regs->gpr[1],
                        IOMUXC_GPR1_OTG_ID_MASK,
index d2b64cc35748ec3cd518fede6f7c0dad8f5aaea5..a990b4cea8ee744abafa7cade88bfb1725402472 100644 (file)
@@ -130,8 +130,7 @@ int board_eth_init(bd_t *bis)
 
 static int setup_fec(void)
 {
-       struct iomuxc_base_regs *iomuxc_regs =
-                               (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+       struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
        int ret;
 
        /* clear gpr1[14], gpr1[18:17] to select anatop clock */
index 9d2651f0cbf1221fc67b36ee5ecaad2bfe372016..9967f80d5ef8f41ad9248d6352d1f821befa4664 100644 (file)
@@ -1122,8 +1122,7 @@ int dram_init(void)
 
 int board_init(void)
 {
-       struct iomuxc_base_regs *const iomuxc_regs
-               = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+       struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
        clrsetbits_le32(&iomuxc_regs->gpr[1],
                        IOMUXC_GPR1_OTG_ID_MASK,
index 2e2fb2a5b78259cdefc61e025cef9737f9c192fd..6d204b343e58f1088cee7d5ccf032ce7d91cba78 100644 (file)
@@ -144,8 +144,7 @@ int board_phy_config(struct phy_device *phydev)
 
 int board_eth_init(bd_t *bis)
 {
-       struct iomuxc_base_regs *const iomuxc_regs =
-                       (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+       struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
        int ret = enable_fec_anatop_clock(ENET_25MHz);
        if (ret)