Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
bool "Support ls1021aqds"
select CPU_V7
select SUPPORT_SPL
+ select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
config TARGET_LS1021ATWR
bool "Support ls1021atwr"
select CPU_V7
select SUPPORT_SPL
+ select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
config TARGET_LS1043AQDS
bool "Support ls1043aqds"
+ select ARCH_LS1043A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
config TARGET_LS1043ARDB
bool "Support ls1043ardb"
+ select ARCH_LS1043A
select ARM64
select ARMV8_MULTIENTRY
select SUPPORT_SPL
source "arch/arm/mach-mvebu/Kconfig"
+source "arch/arm/cpu/armv7/ls102xa/Kconfig"
+
source "arch/arm/cpu/armv7/mx7/Kconfig"
source "arch/arm/cpu/armv7/mx6/Kconfig"
--- /dev/null
+config ARCH_LS1021A
+ bool "Freescale Layerscape LS1021A SoC"
+ select SYS_FSL_ERRATUM_A010315
config ARCH_LS1012A
bool "Freescale Layerscape LS1012A SoC"
select SYS_FSL_MMDC
+ select SYS_FSL_ERRATUM_A010315
+
+config ARCH_LS1043A
+ bool "Freescale Layerscape LS1043A SoC"
+ select SYS_FSL_ERRATUM_A010315
config ARCH_LS1046A
bool "Freescale Layerscape LS1046A SoC"
config SYS_FSL_MMDC
bool "Freescale Multi Mode DDR Controller"
+
+config SYS_FSL_ERRATUM_A010315
+ bool "Workaround for PCIe erratum A010315"
#define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_FSL_ERRATUM_A010315
/* SoC related */
#ifdef CONFIG_LS1043A
#define CONFIG_MAX_CPUS 4
#define CONFIG_SYS_FSL_ERRATUM_A008378
#define CONFIG_SYS_FSL_ERRATUM_A009663
#define CONFIG_SYS_FSL_ERRATUM_A009942
-#define CONFIG_SYS_FSL_ERRATUM_A010315
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#else
#error SoC not defined