On the boards at91sam9260ek, at91sam9263ek and
afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Stelian Pop <stelian@popies.net>
#ifdef CONFIG_MACB
static void afeb9260_macb_hw_init(void)
{
+ unsigned long rstc;
+
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+ rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0D << 8) |
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- AT91_RSTC_ERSTL | (0x0 << 8) |
+ (rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */
#ifdef CONFIG_MACB
static void at91sam9260ek_macb_hw_init(void)
{
+ unsigned long rstc;
+
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+ rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0D << 8)) |
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0 << 8)) |
+ (rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */
#ifdef CONFIG_MACB
static void at91sam9263ek_macb_hw_init(void)
{
+ unsigned long rstc;
+
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
pin_to_mask(AT91_PIN_PE26),
pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
+ rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0D << 8)) |
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0 << 8)) |
+ (rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */