]> git.sur5r.net Git - u-boot/commitdiff
defconfig: puma-rk3399: add defconfig for the RK3399-Q7 (Puma)
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tue, 28 Mar 2017 16:48:52 +0000 (18:48 +0200)
committerSimon Glass <sjg@chromium.org>
Wed, 5 Apr 2017 02:01:57 +0000 (20:01 -0600)
This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM
(under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399
in a Qseven compatible module.

This subsumes the following changes:
 * defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT
 * defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP
 * defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA
 * defconfig: rk3399-puma: don't USE_TINY_PRINTF
 * defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7
 * defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT
 * defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card
 * defconfig: rk3399-puma: enable GMAC support
 * defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash
 * defconfig: rk3399-puma: enable SPI as a boot-source in SPL
 * defconfig: rk3399-puma: disallow non-FIT images from being loaded
 * defconfig: rk3399-puma: rename to puma-rk3399
 * rockchip: config: rk3399: update defconfigs and rk3399_common

For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD.
This both follows how the BootROM probes devices and is a sane default
for customers in device-personalisation (e.g. it allows for quick and
easy factory programming of unpersonalised devices using an SD card)
and field usage (with customer devices expected to have their firmware
either in SPI or MMC).

However, when probing multiple interfaces (according to the result
from the board_boot_order function), we need to ensure that only valid
FIT images are considered and disable the fallback to assuming that a
raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from
jumping to random content loaded from devices that are probed, but
don't contain valid image content).

By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT
options, we ensure that raw images (indistinguishable from random
data) are not considered for booting.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop CONFIG_DEBUG_UART_BOARD_INIT:
Signed-off-by: Simon Glass <sjg@chromium.org>
configs/evb-rk3399_defconfig
configs/puma-rk3399_defconfig [new file with mode: 0644]
include/configs/rk3399_common.h

index bedc1fd31d5330cf5875d60add9fdd6f4722f51c..50b0d749abbc943ccbe319c55ea84c2370d41b42 100644 (file)
@@ -12,6 +12,8 @@ CONFIG_SPL_ATF_TEXT_BASE=0x00010000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
new file mode 100644 (file)
index 0000000..d4e12d7
--- /dev/null
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma"
+CONFIG_FIT=y
+CONFIG_SPL_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/rockchip/evb_rk3399/fit_spl_atf.its"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ9031=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_ROCKCHIP_RK3399_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=115200
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xFF180000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_ERRNO_STR=y
index db3125e173e0c8974a6dd2c2aac4cf60b7a11d28..9d22e0cc6700d898d33b96003abad62b71caec28 100644 (file)
@@ -17,8 +17,6 @@
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 
 #define COUNTER_FREQUENCY               24000000