]> git.sur5r.net Git - u-boot/commitdiff
video: tegra: Update line length to match resolution
authorThierry Reding <thierry.reding@avionic-design.de>
Fri, 23 Nov 2012 00:58:49 +0000 (00:58 +0000)
committerTom Warren <twarren@nvidia.com>
Wed, 16 Jan 2013 20:40:06 +0000 (13:40 -0700)
Instead of storing the computed line length in a local variable, store
it in the global lcd_line_length variable to make sure the LCD subsystem
can properly draw content for the display resolution.

This probably wasn't noticed yet because the only board where LCD
support is currently enabled is Seaboard, which runs at a 1366x768
resolution. As it happens this is the maximum resolution supported and
also the default that is used to initialize the framebuffer before the
configuration from DT is available.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
drivers/video/tegra.c

index 750a2834383f035109ed2f6bd012f63bbfc64243..afcb00881e53202944b03539f22fa5d42324550c 100644 (file)
@@ -145,8 +145,8 @@ static void update_panel_size(struct fdt_disp_config *config)
 
 void lcd_ctrl_init(void *lcdbase)
 {
-       int line_length, size;
        int type = DCACHE_OFF;
+       int size;
 
        assert(disp_config);
 
@@ -160,7 +160,7 @@ void lcd_ctrl_init(void *lcdbase)
                        && disp_config->height <= LCD_MAX_HEIGHT
                        && disp_config->log2_bpp <= LCD_MAX_LOG2_BPP)
                update_panel_size(disp_config);
-       size = lcd_get_size(&line_length);
+       size = lcd_get_size(&lcd_line_length);
 
        /* Set up the LCD caching as requested */
        if (config.cache_type & FDT_LCD_CACHE_WRITE_THROUGH)