bool cap_sd_highspeed;
fdt32_t card_detect_delay;
fdt32_t clock_freq_min_max[2];
- struct phandle_2_cell clocks[4];
+ struct phandle_1_arg clocks[4];
bool disable_wp;
fdt32_t fifo_depth;
fdt32_t interrupts[3];
#if CONFIG_IS_ENABLED(OF_CONTROL)
# if CONFIG_IS_ENABLED(OF_PLATDATA)
int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_2_cell *cells, struct clk *clk)
+ struct phandle_1_arg *cells, struct clk *clk)
{
int ret;
};
#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)
-struct phandle_2_cell;
+struct phandle_1_arg;
int clk_get_by_index_platdata(struct udevice *dev, int index,
- struct phandle_2_cell *cells, struct clk *clk);
+ struct phandle_1_arg *cells, struct clk *clk);
/**
* clock_get_by_index - Get/request a clock by integer index.
/* These structures may only be used in SPL */
#if CONFIG_IS_ENABLED(OF_PLATDATA)
-struct phandle_2_cell {
+struct phandle_0_arg {
+ const void *node;
+ int id[0];
+};
+
+struct phandle_1_arg {
const void *node;
int id;
};
info = self.get_phandle_argc(prop, structs[name])
if info:
# For phandles, include a reference to the target
- self.out('\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),
+ struct_name = 'struct phandle_%d_arg' % info.max_args
+ self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
conv_name_to_c(prop.name),
len(prop.value) / 2))
else:
self.assertEqual('''#include <stdbool.h>
#include <libfdt.h>
struct dtd_source {
-\tstruct phandle_2_cell clocks[1];
+\tstruct phandle_1_arg clocks[1];
};
struct dtd_target {
\tfdt32_t\t\tintval;