Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

* 'master' of git://git.denx.de/u-boot-ppc4xx:
  ppc4xx: Change DDR2 CL from 4 to 5 for intip
  ppc4xx: Improve lm63 pwm on dlvision-10g
  ppc4xx: Do not stop booting on any keypress on intip

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 4fc5262bc17ea86b33af686c6c60b6b8426e4c41..146819712d824d7bf3e59990e851b86e36864344 100644 (file)
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -34,7 +34,7 @@
  * Include common defines/options for all AMCC eval boards
  */
 #define CONFIG_HOSTNAME                dlvsion-10g
-#define CONFIG_IDENT_STRING    " dlvision-10g 0.01"
+#define CONFIG_IDENT_STRING    " dlvision-10g 0.02"
 #include "amcc-common.h"
 
 #define CONFIG_BOARD_EARLY_INIT_F      /* call board_early_init_f */
@@ -117,8 +117,8 @@
 #define CONFIG_DTT_LM63                1       /* National LM63        */
 #define CONFIG_DTT_SENSORS     { 0x4c, 0x4e }  /* Sensor addresses     */
 #define CONFIG_DTT_PWM_LOOKUPTABLE     \
-               { { 40, 10 }, { 43, 13 }, { 46, 16 },  \
-                 { 50, 20 }, { 53, 27 }, { 56, 34 }, { 60, 40 } }
+               { { 46, 10 }, { 48, 14 }, { 50, 19 }, { 52, 23 },\
+                 { 54, 27 }, { 56, 31 }, { 58, 36 }, { 60, 40 } }
 #define CONFIG_DTT_TACH_LIMIT  0xa10
 
 /* EBC peripherals */

diff --git a/include/configs/intip.h b/include/configs/intip.h
index 3ff4a86ab963deb2a83e8bc2a1c677c07129f3b1..92b65af7c9d231469b470d0380899b49cff8085a 100644 (file)
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -37,10 +37,10 @@
 #define CONFIG_460EX           1       /* Specific PPC460EX            */
 #ifdef CONFIG_DEVCONCENTER
 #define CONFIG_HOSTNAME                devconcenter
-#define CONFIG_IDENT_STRING    " devconcenter 0.02"
+#define CONFIG_IDENT_STRING    " devconcenter 0.05"
 #else
 #define CONFIG_HOSTNAME                intip
-#define CONFIG_IDENT_STRING    " intip 0.02"
+#define CONFIG_IDENT_STRING    " intip 0.05"
 #endif
 #define CONFIG_440             1
 #define CONFIG_4xx             1       /* ... PPC4xx family */
@@ -63,6 +63,10 @@
 #define CONFIG_FIT
 #define CFG_ALT_MEMTEST
 
+#undef CONFIG_ZERO_BOOTDELAY_CHECK     /* ignore keypress on bootdelay==0 */
+#define CONFIG_AUTOBOOT_KEYED          /* use key strings to stop autoboot */
+#define CONFIG_AUTOBOOT_STOP_STR " "
+
 /*
  * Base addresses -- Note these are effective addresses where the
  * actual resources get mapped (not physical addresses)
@@ -196,13 +200,13 @@
 #define CONFIG_SYS_SDRAM0_INITPLR2     0x81020000
 #define CONFIG_SYS_SDRAM0_INITPLR3     0x81030000
 #define CONFIG_SYS_SDRAM0_INITPLR4     0x81010002
-#define CONFIG_SYS_SDRAM0_INITPLR5     0xE4000542
+#define CONFIG_SYS_SDRAM0_INITPLR5     0xE4000552
 #define CONFIG_SYS_SDRAM0_INITPLR6     0x81900400
 #define CONFIG_SYS_SDRAM0_INITPLR7     0x8A880000
 #define CONFIG_SYS_SDRAM0_INITPLR8     0x8A880000
 #define CONFIG_SYS_SDRAM0_INITPLR9     0x8A880000
 #define CONFIG_SYS_SDRAM0_INITPLR10    0x8A880000
-#define CONFIG_SYS_SDRAM0_INITPLR11    0x81000442
+#define CONFIG_SYS_SDRAM0_INITPLR11    0x81000452
 #define CONFIG_SYS_SDRAM0_INITPLR12    0x81010382
 #define CONFIG_SYS_SDRAM0_INITPLR13    0x81010002
 #define CONFIG_SYS_SDRAM0_INITPLR14    0x00000000
@@ -212,11 +216,11 @@
 #define CONFIG_SYS_SDRAM0_RDCC         0x40000000
 #define CONFIG_SYS_SDRAM0_DLCR         0x00000000
 #define CONFIG_SYS_SDRAM0_CLKTR                0x40000000
-#define CONFIG_SYS_SDRAM0_WRDTR                0x84000823
+#define CONFIG_SYS_SDRAM0_WRDTR                0x86000823
 #define CONFIG_SYS_SDRAM0_SDTR1                0x80201000
 #define CONFIG_SYS_SDRAM0_SDTR2                0x32204232
 #define CONFIG_SYS_SDRAM0_SDTR3                0x090C0D15
-#define CONFIG_SYS_SDRAM0_MMODE                0x00000442
+#define CONFIG_SYS_SDRAM0_MMODE                0x00000452
 #define CONFIG_SYS_SDRAM0_MEMODE       0x00000002
 
 #define CONFIG_SYS_MBYTES_SDRAM        256     /* 256MB */