bool "Porter board"
select DM
select DM_SERIAL
- select SUPPORT_TPL
select SUPPORT_SPL
- select SPL_DM if SPL
select USE_TINY_PRINTF
- select TPL_TINY_MEMSET
+ select SPL_TINY_MEMSET
config TARGET_STOUT
bool "Stout board"
select DM
select DM_SERIAL
- select SUPPORT_TPL
select SUPPORT_SPL
- select SPL_DM if SPL
select USE_TINY_PRINTF
- select TPL_TINY_MEMSET
+ select SPL_TINY_MEMSET
endchoice
/*
- * Specialty padding for the RCar Gen2 TPL JTAG loading
+ * Specialty padding for the RCar Gen2 SPL JTAG loading
*
* SPDX-License-Identifier: GPL-2.0
*/
_start:
ARM_VECTORS
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
.word 0x0badc0d3;
.word 0x0badc0d3;
.word 0x0badc0d3;
#include <linux/linkage.h>
ENTRY(lowlevel_init)
-#ifndef CONFIG_TPL_BUILD
+#ifndef CONFIG_SPL_BUILD
mrc p15, 0, r4, c0, c0, 5 /* mpidr */
orr r4, r4, r4, lsr #6
and r4, r4, #7 /* id 0-3 = ca15.0,1,2,3 */
#define SD2CKCR 0xE615026C
#define SD_97500KHZ 0x7
-#ifdef CONFIG_TPL_BUILD
struct reg_config {
u16 off;
u32 val;
;
}
-static void tpl_init_sys(void)
+static void spl_init_sys(void)
{
u32 r0 = 0;
:"=r"(r0));
}
-static void tpl_init_pfc(void)
+static void spl_init_pfc(void)
{
static const struct reg_config pfc_with_unlock[] = {
{ 0x0090, 0x60000000 },
pfc_base | pfc_without_unlock[i].off);
}
-static void tpl_init_gpio(void)
+static void spl_init_gpio(void)
{
static const u16 gpio_offs[] = {
0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x5400, 0x5800
writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
}
-static void tpl_init_lbsc(void)
+static void spl_init_lbsc(void)
{
static const struct reg_config lbsc_config[] = {
{ 0x00, 0x00000020 },
writel(0, lbsc_base | lbsc_offs[i]);
}
-static void tpl_init_dbsc(void)
+static void spl_init_dbsc(void)
{
static const struct reg_config dbsc_config1[] = {
{ 0x0280, 0x0000a55a },
}
-static void tpl_init_qspi(void)
+static void spl_init_qspi(void)
{
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917);
*/
writel(SD_97500KHZ, SD2CKCR);
- tpl_init_sys();
- tpl_init_pfc();
- tpl_init_gpio();
- tpl_init_lbsc();
- tpl_init_dbsc();
- tpl_init_qspi();
+ spl_init_sys();
+ spl_init_pfc();
+ spl_init_gpio();
+ spl_init_lbsc();
+ spl_init_dbsc();
+ spl_init_qspi();
}
-#endif
void spl_board_init(void)
{
void board_boot_order(u32 *spl_boot_list)
{
-#ifdef CONFIG_TPL_BUILD
const u32 jtag_magic = 0x1337c0de;
const u32 load_magic = 0xb33fc0de;
/*
* If JTAG probe sets special word at 0xe6300020, then it must
- * put U-Boot into RAM and TPL will start it from RAM.
+ * put U-Boot into RAM and SPL will start it from RAM.
*/
- if (readl(CONFIG_TPL_TEXT_BASE + 0x20) == jtag_magic) {
+ if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) {
printf("JTAG boot detected!\n");
- while (readl(CONFIG_TPL_TEXT_BASE + 0x24) != load_magic)
+ while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic)
;
spl_boot_list[0] = BOOT_DEVICE_RAM;
return;
}
-#endif
/* Boot from SPI NOR with YMODEM UART fallback. */
spl_boot_list[0] = BOOT_DEVICE_SPI;
#define SD2CKCR 0xE615026C
#define SD_97500KHZ 0x7
-#ifdef CONFIG_TPL_BUILD
struct reg_config {
u16 off;
u32 val;
;
}
-static void tpl_init_sys(void)
+static void spl_init_sys(void)
{
u32 r0 = 0;
:"=r"(r0));
}
-static void tpl_init_pfc(void)
+static void spl_init_pfc(void)
{
static const struct reg_config pfc_with_unlock[] = {
{ 0x0090, 0x00140300 },
pfc_base | pfc_without_unlock[i].off);
}
-static void tpl_init_gpio(void)
+static void spl_init_gpio(void)
{
static const u16 gpio_offs[] = {
0x1000, 0x3000, 0x4000, 0x5000
writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
}
-static void tpl_init_lbsc(void)
+static void spl_init_lbsc(void)
{
static const struct reg_config lbsc_config[] = {
{ 0x00, 0x00000020 },
writel(0, lbsc_base | lbsc_offs[i]);
}
-static void tpl_init_dbsc(void)
+static void spl_init_dbsc(void)
{
static const struct reg_config dbsc_config1[] = {
{ 0x0280, 0x0000a55a },
}
-static void tpl_init_qspi(void)
+static void spl_init_qspi(void)
{
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917);
*/
writel(SD_97500KHZ, SD2CKCR);
- tpl_init_sys();
- tpl_init_pfc();
- tpl_init_gpio();
- tpl_init_lbsc();
- tpl_init_dbsc();
- tpl_init_qspi();
+ spl_init_sys();
+ spl_init_pfc();
+ spl_init_gpio();
+ spl_init_lbsc();
+ spl_init_dbsc();
+ spl_init_qspi();
}
-#endif
void spl_board_init(void)
{
void board_boot_order(u32 *spl_boot_list)
{
-#ifdef CONFIG_TPL_BUILD
const u32 jtag_magic = 0x1337c0de;
const u32 load_magic = 0xb33fc0de;
/*
* If JTAG probe sets special word at 0xe6300020, then it must
- * put U-Boot into RAM and TPL will start it from RAM.
+ * put U-Boot into RAM and SPL will start it from RAM.
*/
- if (readl(CONFIG_TPL_TEXT_BASE + 0x20) == jtag_magic) {
+ if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) {
printf("JTAG boot detected!\n");
- while (readl(CONFIG_TPL_TEXT_BASE + 0x24) != load_magic)
+ while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic)
;
spl_boot_list[0] = BOOT_DEVICE_RAM;
return;
}
-#endif
/* Boot from SPI NOR with YMODEM UART fallback. */
spl_boot_list[0] = BOOT_DEVICE_SPI;
CONFIG_ARM=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_R8A7791=y
CONFIG_TARGET_PORTER=y
-CONFIG_TPL_TEXT_BASE=0xe6300000
-CONFIG_TPL_MAX_SIZE=16384
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_TPL=y
-CONFIG_TPL_BOARD_INIT=y
-CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y
-CONFIG_TPL_RAM_SUPPORT=y
-CONFIG_TPL_RAM_DEVICE=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SPI_FLASH_SUPPORT=y
-CONFIG_TPL_SPI_LOAD=y
-CONFIG_TPL_SPI_SUPPORT=y
-CONFIG_TPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
-CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas power-domains"
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
-CONFIG_SPL_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_PCI_RCAR_GEN2=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
-CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_PFC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-# CONFIG_TPL_DM_SERIAL is not set
CONFIG_SCIF_CONSOLE=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_ARM=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_R8A7790=y
CONFIG_TARGET_STOUT=y
-CONFIG_TPL_TEXT_BASE=0xe6300000
-CONFIG_TPL_MAX_SIZE=16384
CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot"
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
CONFIG_FIT=y
CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_TPL=y
-CONFIG_TPL_BOARD_INIT=y
-CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y
-CONFIG_TPL_RAM_SUPPORT=y
-CONFIG_TPL_RAM_DEVICE=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SPI_FLASH_SUPPORT=y
-CONFIG_TPL_SPI_LOAD=y
-CONFIG_TPL_SPI_SUPPORT=y
-CONFIG_TPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
-CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas power-domains"
CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_OF_TRANSLATE=y
CONFIG_CLK=y
-CONFIG_SPL_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_PCI_RCAR_GEN2=y
CONFIG_PINCTRL=y
CONFIG_PINCONF=y
-CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_PFC=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-# CONFIG_TPL_DM_SERIAL is not set
CONFIG_SCIF_CONSOLE=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
"initrd_high=0xffffffff\0"
/* SPL support */
-#define CONFIG_SPL_TEXT_BASE 0xe6304000
+#define CONFIG_SPL_TEXT_BASE 0xe6300000
#define CONFIG_SPL_STACK 0xe6340000
-#define CONFIG_SPL_MAX_SIZE 0x40000
+#define CONFIG_SPL_MAX_SIZE 0x4000
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
-
-/* TPL support */
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF0
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#endif
"initrd_high=0xffffffff\0"
/* SPL support */
-#define CONFIG_SPL_TEXT_BASE 0xe6304000
+#define CONFIG_SPL_TEXT_BASE 0xe6300000
#define CONFIG_SPL_STACK 0xe6340000
-#define CONFIG_SPL_MAX_SIZE 0x40000
+#define CONFIG_SPL_MAX_SIZE 0x4000
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
-
-/* TPL support */
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIFA0
#define CONFIG_SH_SCIF_CLK_FREQ 52000000
#endif