]> git.sur5r.net Git - u-boot/commitdiff
sf: probe: Code cleanup
authorJagan Teki <jteki@openedev.com>
Tue, 3 Nov 2015 18:57:35 +0000 (00:27 +0530)
committerJagan Teki <jteki@openedev.com>
Fri, 11 Dec 2015 16:42:23 +0000 (22:12 +0530)
- Move bar read code below the bar write hance both
  at once place, hence it easy for #ifdef macro only
  once and readable.
- Move read_cmd_array at top

Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
drivers/mtd/spi/sf_ops.c

index 54c6468e424007f09e2d97c9757416c1400d70f9..8d6040e71c4d49a20d2fb356997e18a39b6b8294 100644 (file)
@@ -30,6 +30,16 @@ static void spi_flash_addr(u32 addr, u8 *cmd)
        cmd[3] = addr >> 0;
 }
 
+/* Read commands array */
+static u8 spi_read_cmds_array[] = {
+       CMD_READ_ARRAY_SLOW,
+       CMD_READ_ARRAY_FAST,
+       CMD_READ_DUAL_OUTPUT_FAST,
+       CMD_READ_DUAL_IO_FAST,
+       CMD_READ_QUAD_OUTPUT_FAST,
+       CMD_READ_QUAD_IO_FAST,
+};
+
 int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
 {
        int ret;
@@ -133,6 +143,35 @@ bar_end:
        flash->bank_curr = bank_sel;
        return flash->bank_curr;
 }
+
+static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
+{
+       u8 curr_bank = 0;
+       int ret;
+
+       if (flash->size <= SPI_FLASH_16MB_BOUN)
+               goto bank_end;
+
+       switch (idcode0) {
+       case SPI_FLASH_CFI_MFR_SPANSION:
+               flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+               flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+       default:
+               flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+               flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+       }
+
+       ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
+                                   &curr_bank, 1);
+       if (ret) {
+               debug("SF: fail to read bank addr register\n");
+               return ret;
+       }
+
+bank_end:
+       flash->bank_curr = curr_bank;
+       return 0;
+}
 #endif
 
 #ifdef CONFIG_SF_DUAL_FLASH
@@ -762,16 +801,6 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
 #endif
 
 
-/* Read commands array */
-static u8 spi_read_cmds_array[] = {
-       CMD_READ_ARRAY_SLOW,
-       CMD_READ_ARRAY_FAST,
-       CMD_READ_DUAL_OUTPUT_FAST,
-       CMD_READ_DUAL_IO_FAST,
-       CMD_READ_QUAD_OUTPUT_FAST,
-       CMD_READ_QUAD_IO_FAST,
-};
-
 #ifdef CONFIG_SPI_FLASH_MACRONIX
 static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
 {
@@ -839,37 +868,6 @@ static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
        }
 }
 
-#ifdef CONFIG_SPI_FLASH_BAR
-static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
-{
-       u8 curr_bank = 0;
-       int ret;
-
-       if (flash->size <= SPI_FLASH_16MB_BOUN)
-               goto bank_end;
-
-       switch (idcode0) {
-       case SPI_FLASH_CFI_MFR_SPANSION:
-               flash->bank_read_cmd = CMD_BANKADDR_BRRD;
-               flash->bank_write_cmd = CMD_BANKADDR_BRWR;
-       default:
-               flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
-               flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
-       }
-
-       ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
-                                   &curr_bank, 1);
-       if (ret) {
-               debug("SF: fail to read bank addr register\n");
-               return ret;
-       }
-
-bank_end:
-       flash->bank_curr = curr_bank;
-       return 0;
-}
-#endif
-
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 {