#define DWMCI_DIVRATIO_BIT 24
#define DWMCI_DIVRATIO_MASK 0x7
-#ifdef CONFIG_OF_CONTROL
int exynos_dwmmc_init(const void *blob);
-#endif
int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel);
/* panel driver init based on mipi dsi interface */
void s6e8ax0_init(void);
-#ifdef CONFIG_OF_CONTROL
extern int mipi_power(void);
-#endif
#endif /* _DSIM_H */
return s5p_sdhci_init(base, index, bus_width);
}
-#ifdef CONFIG_OF_CONTROL
int exynos_mmc_init(const void *blob);
-#endif
#endif
return -1;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static int exynos4_pinmux_decode_periph_id(const void *blob, int node)
{
int err;
reset_set_enable(periph_id, 0);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int clock_decode_periph_id(const void *blob, int node)
{
enum periph_id id;
assert(clock_periph_id_isvalid(id));
return id;
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
int clock_verify(void)
{
writel(reg, reset);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is
return clk_id;
}
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void)
{
writel(reg, reset);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is
return clk_id;
}
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void)
{
writel(reg, reset);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is
return clk_id;
}
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void)
{
writel(reg, reset);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* Convert a device tree clock ID to our peripheral ID. They are mostly
* the same but we are very cautious so we check that a valid clock ID is
return clk_id;
}
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void clock_early_init(void)
{
static int reset_pin = -1;
#endif
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
ulong ram_base;
void dram_init_banksize(void)
int dram_init(void)
{
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int node;
fdt_addr_t addr;
fdt_size_t size;
}
#endif
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
bool cli_process_fdt(const char **cmdp)
{
/* Allow the fdt to override the boot command */
*/
hang();
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
void cli_loop(void)
{
gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN;
gd->malloc_ptr = 0;
#endif
- if (IS_ENABLED(CONFIG_OF_CONTROL) &&
- IS_ENABLED(CONFIG_SPL_OF_CONTROL)) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL)) {
ret = fdtdec_setup();
if (ret) {
debug("fdtdec_setup() returned error %d\n", ret);
obj-y += device.o lists.o root.o uclass.o util.o
obj-$(CONFIG_DEVRES) += devres.o
ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_OF_CONTROL) += simple-bus.o
+obj-$(CONFIG_$(SPL_)OF_CONTROL) += simple-bus.o
endif
obj-$(CONFIG_$(SPL_)DM_DEVICE_REMOVE) += device-remove.o
obj-$(CONFIG_DM) += dump.o
dev->seq = -1;
dev->req_seq = -1;
- if (IS_ENABLED(CONFIG_OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL) && IS_ENABLED(CONFIG_DM_SEQ_ALIAS)) {
/*
* Some devices, such as a SPI bus, I2C bus and serial ports
* are numbered using aliases.
fdt_addr_t dev_get_addr(struct udevice *dev)
{
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
fdt_addr_t addr;
addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
return 0;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/**
* driver_check_compatible() - Check if a driver is compatible with this node
*
ret = device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
if (ret)
return ret;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
DM_ROOT_NON_CONST->of_offset = 0;
#endif
ret = device_probe(DM_ROOT_NON_CONST);
return ret;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset,
bool pre_reloc_only)
{
return ret;
}
- if (OF_CONTROL) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL)) {
ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
if (ret) {
debug("dm_scan_fdt() failed: %d\n", ret);
.bind = mxc_gpio_bind,
};
-#ifndef CONFIG_OF_CONTROL
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct mxc_gpio_plat mxc_plat[] = {
{ 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
{ 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
return 0;
}
-#ifndef CONFIG_OF_CONTROL
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct vybrid_gpio_platdata vybrid_gpio[] = {
{0, GPIO0_BASE_ADDR, "GPIO0 "},
{1, GPIO1_BASE_ADDR, "GPIO1 "},
}
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static void process_nodes(const void *blob, int node_list[], int count,
int is_highspeed)
{
return 0;
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
#ifdef CONFIG_EXYNOS5
static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
obj-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
endif
obj-y += input.o
-obj-$(CONFIG_OF_CONTROL) += key_matrix.o
+obj-$(CONFIG_$(SPL_)OF_CONTROL) += key_matrix.o
if (config.created)
return 0;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int node;
node = fdtdec_next_compatible(gd->fdt_blob, 0,
return exynos_dwmci_core_init(host, index);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM];
static int do_dwmci_init(struct dwmci_host *host)
return s5p_sdhci_core_init(host);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS];
static int do_sdhci_init(struct sdhci_host *host)
struct mmc_host mmc_host[CONFIG_SYS_MMC_MAX_DEVICE];
-#ifndef CONFIG_OF_CONTROL
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
#error "Please enable device tree support to use this driver"
#endif
return 0;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int zynq_sdhci_of_init(const void *blob)
{
int offset = 0;
return 0;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
{
fdt_addr_t addr;
return 0;
}
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
/**
* spi_flash_probe_slave() - Probe for a SPI flash device on a bus
}
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
debug("SF: FDT decode error\n");
ret = -EINVAL;
return 1;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int xilinx_emaclite_of_init(const void *blob)
{
int offset = 0;
return 1;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int zynq_gem_of_init(const void *blob)
{
int offset = 0;
*/
static int get_tmu_fdt_values(struct tmu_info *info, const void *blob)
{
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
fdt_addr_t addr;
int node;
int error = 0;
{
static const char name[] = "MAX77686_PMIC";
struct pmic *p = pmic_alloc();
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
const void *blob = gd->fdt_blob;
int node, parent, tmp;
#endif
return -ENOMEM;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
if (node < 0) {
debug("PMIC: No node for PMIC Chip in device tree\n");
return 0;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
struct ns16550_platdata *plat = dev->platdata;
struct udevice *dev;
int node;
- if (OF_CONTROL && gd->fdt_blob) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL) && gd->fdt_blob) {
/* Check for a chosen console */
node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path");
if (node < 0)
}
}
}
- if (!SPL_BUILD || !OF_CONTROL || !gd->fdt_blob) {
+ if (!SPL_BUILD || !CONFIG_IS_ENABLED(OF_CONTROL) || !gd->fdt_blob) {
/*
* Try to use CONFIG_CONS_INDEX if available (it is numbered
* from 1!).
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id omap_serial_ids[] = {
{ .compatible = "ti,omap3-uart" },
{ .compatible = "ti,omap4-uart" },
.setbrg = pl01x_serial_setbrg,
};
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id pl01x_serial_id[] ={
{.compatible = "arm,pl011", .data = TYPE_PL011},
{.compatible = "arm,pl010", .data = TYPE_PL010},
#include <ns16550.h>
#include <serial.h>
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id tegra_serial_ids[] = {
{ .compatible = "nvidia,tegra20-uart" },
{ }
U_BOOT_DRIVER(serial_ns16550) = {
.name = "serial_tegra20",
.id = UCLASS_SERIAL,
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
.of_match = tegra_serial_ids,
.ofdata_to_platdata = tegra_serial_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
return 0;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id uniphier_uart_of_match[] = {
{ .compatible = "socionext,uniphier-uart" },
{ /* sentinel */ }
static struct serial_device uart_zynq_serial1_device =
INIT_PSSERIAL_STRUCTURE(1, "ttyPS1");
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
__weak struct serial_device *default_serial_console(void)
{
const void *blob = gd->fdt_blob;
const void *blob)
{
int error = 0;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
enum fdt_compat_id compat;
int node;
int parent;
const void *blob)
{
int error = 0;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
enum fdt_compat_id compat;
int node;
int parent;
static enum i2c_chip_type tpm_vendor_chip_type(void)
{
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
const void *blob = gd->fdt_blob;
if (fdtdec_next_compatible(blob, 0, COMPAT_INFINEON_SLB9645_TPM) >= 0)
void exynos_dp_set_base_addr(void)
{
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
unsigned int node = fdtdec_next_compatible(gd->fdt_blob,
0, COMPAT_SAMSUNG_EXYNOS5_DP);
if (node <= 0)
static unsigned int panel_width, panel_height;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
vidinfo_t panel_info = {
/*
* Insert a value here so that we don't end up in the BSS
exynos_backlight_on(1);
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
node = fdtdec_next_compatible(gd->fdt_blob, 0,
COMPAT_SAMSUNG_EXYNOS_FIMD);
if (node <= 0) {
exynos_mipi_dsi_init();
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int exynos_lcd_early_init(const void *blob)
{
unsigned int node;
set_system_display_ctrl();
set_lcd_clk();
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
#ifdef CONFIG_EXYNOS_MIPI_DSIM
exynos_init_dsim_platform_data(&panel_info);
#endif
writel(cfg, &fimd_ctrl->winshmap);
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* The reset value for FIMD SYSMMU register MMU_CTRL is 3
* on Exynos5420 and newer versions.
{
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
unsigned int node;
node = fdtdec_next_compatible(gd->fdt_blob,
DECLARE_GLOBAL_DATA_PTR;
static struct exynos_platform_mipi_dsim *dsim_pd;
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
static struct mipi_dsim_config dsim_config_dt;
static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
dsim_pd = pd;
}
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
int exynos_dsim_config_parse_dt(const void *blob)
{
int node;
.vl_col = -1,
};
-#ifndef CONFIG_OF_CONTROL
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
#error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
#endif
*/
int cli_simple_parse_line(char *line, char *argv[]);
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
/**
* cli_process_fdt() - process the boot command from the FDT
*
#undef CONFIG_CMD_SNTP
#undef CONFIG_CMD_TFTPPUT
#undef CONFIG_CMD_TFTPSRV
-#ifndef CONFIG_SPL_OF_CONTROL
-#undef CONFIG_OF_CONTROL
-#endif
#ifndef CONFIG_SPL_DM
#undef CONFIG_DM_SERIAL
# define CONFIG_XILINX_TB_WATCHDOG
#endif
-#ifndef CONFIG_OF_CONTROL
+#if !defined(CONFIG_OF_CONTROL) || \
+ (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL))
/* ddr sdram - main memory */
# define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
# define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
#define CONFIG_SPI_FLASH_BAR
#endif
-#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
+#if CONFIG_IS_ENABLED(OF_CONTROL) /* DW SPI is controlled via DT */
#define CONFIG_DESIGNWARE_SPI
#define CONFIG_CMD_SPI
#endif
ulong data;
};
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
#define of_match_ptr(_ptr) (_ptr)
#else
#define of_match_ptr(_ptr) NULL
-#endif /* CONFIG_OF_CONTROL */
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
/**
* struct driver - A driver for a feature or peripheral
#define SPL_BUILD 0
#endif
-#ifdef CONFIG_OF_CONTROL
-# if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)
-# define OF_CONTROL 0
-# else
-# define OF_CONTROL 1
-# endif
-#else
-# define OF_CONTROL 0
-#endif
-
/*
* Information about a resource. start is the first address of the resource
* and end is the last address (inclusive). The length of the resource will
obj-y += crc16.o
obj-$(CONFIG_ERRNO_STR) += errno_str.o
obj-$(CONFIG_FIT) += fdtdec_common.o
-obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_OF_CONTROL) += fdtdec.o
+obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
+obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o
obj-$(CONFIG_GZIP) += gunzip.o
obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_OF_LIBFDT) += libfdt/
-obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_OF_CONTROL) += fdtdec.o
endif
-
ifdef CONFIG_SPL_OF_CONTROL
obj-$(CONFIG_OF_LIBFDT) += libfdt/
-obj-$(CONFIG_OF_CONTROL) += fdtdec_common.o
-obj-$(CONFIG_OF_CONTROL) += fdtdec.o
endif
+obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
+obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec.o
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o
int fdtdec_setup(void)
{
-#ifdef CONFIG_OF_CONTROL
+#if CONFIG_IS_ENABLED(OF_CONTROL)
# ifdef CONFIG_OF_EMBED
/* Get a pointer to the FDT */
gd->fdt_blob = __dtb_dt_begin;
# TODO: Invent a better way
ifdef CONFIG_SPL_BUILD
-ifndef CONFIG_SPL_OF_CONTROL
-CONFIG_OF_CONTROL=
-endif
ifndef CONFIG_SPL_DM
CONFIG_DM_SERIAL=