]> git.sur5r.net Git - u-boot/commitdiff
Migrate esd 405EP boards to new NAND subsystem
authorMatthias Fuchs <matthias.fuchs@esd-electronics.com>
Mon, 9 Jul 2007 08:10:08 +0000 (10:10 +0200)
committerStefan Roese <sr@denx.de>
Mon, 9 Jul 2007 08:55:56 +0000 (10:55 +0200)
Remove unused CFG_NAND_LEGACY define

These boards to not have NAND.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
include/configs/CPCI405.h
include/configs/CPCI4052.h
include/configs/CPCI405AB.h
include/configs/CPCI405DT.h

index 9acde1e6f03b6a1a334099afef97d5885638ebb4..9c0412932a0573f042b802bab82cc6dc75a687a3 100644 (file)
@@ -83,8 +83,6 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-#define CFG_NAND_LEGACY
-
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
 #define CONFIG_SDRAM_BANK0     1       /* init onboard SDRAM bank 0    */
index 3fc99c50244820adf460c922d33bbc510a89783c..2a328a63a37bc4d2126503b1698951e238c5b722 100644 (file)
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-#define CFG_NAND_LEGACY
-
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
 #define CONFIG_SDRAM_BANK0     1       /* init onboard SDRAM bank 0    */
index 4e2e1a834d890bbc1366ebaf878ad376cb0b5043..69466862b7a1c0252cc55fe35c6c3af3e7cbc18a 100644 (file)
@@ -91,9 +91,6 @@
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-#define CFG_NAND_LEGACY
-
-
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
 #define CONFIG_SDRAM_BANK0     1       /* init onboard SDRAM bank 0    */
index ab302df7437ddbaec80fba3e62881f8929134896..4ae240e915ad2ce6780e9397bb29099d0068f7c6 100644 (file)
 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
 
-#define CFG_NAND_LEGACY
-
 #undef CONFIG_WATCHDOG                 /* watchdog disabled            */
 
 #define CONFIG_SDRAM_BANK0     1       /* init onboard SDRAM bank 0    */