]> git.sur5r.net Git - u-boot/commitdiff
x86: qemu: Enable legacy IDE I/O ports decode
authorBin Meng <bmeng.cn@gmail.com>
Mon, 25 May 2015 14:36:26 +0000 (22:36 +0800)
committerSimon Glass <sjg@chromium.org>
Thu, 4 Jun 2015 08:39:39 +0000 (02:39 -0600)
QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix
driver does sanity check to see whether legacy ports decode is turned on.
To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/qemu/pci.c
arch/x86/include/asm/arch-qemu/device.h [new file with mode: 0644]
arch/x86/include/asm/arch-qemu/qemu.h

index 2f4ba1785db408ce8b06f77860fa695cb67ed6a2..467d51dbed8a66473cbd050180ca6affa72776b6 100644 (file)
@@ -8,6 +8,7 @@
 #include <pci.h>
 #include <pci_rom.h>
 #include <asm/pci.h>
+#include <asm/arch/device.h>
 #include <asm/arch/qemu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -87,5 +88,18 @@ int board_pci_post_scan(struct pci_controller *hose)
        for (i = 0; i < PAM_NUM; i++)
                x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW);
 
+       if (device == PCI_DEVICE_ID_INTEL_82441) {
+               /*
+                * Enable legacy IDE I/O ports decode
+                *
+                * Note: QEMU always decode legacy IDE I/O port on PIIX chipset.
+                * However Linux ata_piix driver does sanity check on these two
+                * registers to see whether legacy ports decode is turned on.
+                * This is to make Linux ata_piix driver happy.
+                */
+               x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN);
+               x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN);
+       }
+
        return ret;
 }
diff --git a/arch/x86/include/asm/arch-qemu/device.h b/arch/x86/include/asm/arch-qemu/device.h
new file mode 100644 (file)
index 0000000..2a8d460
--- /dev/null
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _QEMU_DEVICE_H_
+#define _QEMU_DEVICE_H_
+
+#include <pci.h>
+
+#define QEMU_I440FX    PCI_BDF(0, 0, 0)
+#define PIIX_ISA       PCI_BDF(0, 1, 0)
+#define PIIX_IDE       PCI_BDF(0, 1, 1)
+#define PIIX_USB       PCI_BDF(0, 1, 2)
+
+#define QEMU_Q35       PCI_BDF(0, 0, 0)
+
+#endif /* _QEMU_DEVICE_H_ */
index 7a9901d261be2b3b35723bb5509eb49d53ea7aa9..5cbfffffee55c168f4ab0f8d29414821a7fd488b 100644 (file)
 #define PAM_NUM                        7
 #define PAM_RW                 0x33
 
+/* IDE Timing Register */
+#define IDE0_TIM               0x40
+#define IDE1_TIM               0x42
+#define IDE_DECODE_EN          0x8000
+
 /* I/O Ports */
 #define CMOS_ADDR_PORT         0x70
 #define CMOS_DATA_PORT         0x71